• Title/Summary/Keyword: Thin film transistors

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Influence of Wet Annealing on the Performance of SiZnSnO Thin Film Transistors

  • Han, Sangmin;Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.1
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    • pp.34-36
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    • 2015
  • Amorphous SiZnSnO(SZTO) thin film transistors(TFTs) have been fabricated by RF magnetron sputtering process, and they were annealed in air and in wet ambient. The electrical performance and the structure were analyzed by I-V measurement, XPS, AFM, and XRD. The results showed improvement in device performance by wet annealing process compared to air annealing treatment, because free electron was shown to be increased due to reaction of oxygen and hydrogen generating oxygen vacancy. This is understood by the generation of free electrons. We expect the wet annealing process to be a promising candidate to contributing to high electrical performance of oxide thin film transistors for backplane device applications.

Solution-Processed Zinc-Tin Oxide Thin-Film Transistors for Integrated Circuits

  • Kim, Kwang-Ho;Park, Sung-Kyu;Kim, Yong-Hoon;Kim, Hyun-Soo;Oh, Min-Suk;Han, Jeong-In
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.534-536
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    • 2009
  • We have fabricated solution-processed zinc-tin oxide thin film transistors (TFTs) and simple circuits on glass substrates. We report a solutionprocessed zinc-tin oxide TFTs on silicon wafer with mobility greater than 9 $cm^2/V{\cdot}s$ (W/L = 100/5 ${\mu}m$) and threshold voltage variation of less than 1 V after bias-stressing. Also, we fabricated solution-processed zinc-tin oxide circuits including inverters and 7-stage ring oscillators fabricated on glass substrates using the developed zinc-tin oxide TFTs.

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Fabrication of Sub-$10{\mu}m$ Screen Printed Organic Thin-Film Transistors on Paper

  • Jo, Jeong-Dai;Yu, Jong-Su;Yun, Seong-Man;Kim, Dong-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.896-898
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    • 2009
  • The printed electrodes of organic thin-film transistors (OTFTs) were fabricated by screen printing using nanoparticle silver pastes. The screen printed OTFT corresponds to channel lengths between 7.6 to 82.6 ${\mu}m$ (designed L=10 to 80 ${\mu}m$) on the $150{\times}150mm^2$ paper. The channel length deviations for 40 to 80 ${\mu}m$ patterns were less than 5 %. However, the channel lengths for 10 to 30 ${\mu}m$ patterns were increased by 20 %. The screen printed bis(triisopropyl-silylethynyl) pentacene (TIPS-pentacene) OTFTs obtained had a field-effect mobility as large as 0.08 (${\pm}0.02$) $cm^2$/Vs, an on/off current ratio of $10^5$ and a subthreshold slope of 1.95 V/decade.

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Effects of Soft Baking Temperature on the Properties of Solution Processed Zn-Sn-O Thin-Film Transistors (소프트 베이킹 온도가 용액기반 Zn-Sn-O 박막 트랜지스터의 전기적 특성에 미치는 영향)

  • Lee, Jae-Won;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.1
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    • pp.6-10
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    • 2016
  • In this study, the effects of soft baking temperature on the solution derived ZTO (Zn-Sn-O) TFTs (thin-film transistors) as a In-free oxide semiconductor were investigated. In spite of the same hard baking at high temperature($600^{\circ}C$), the electrical properties of ZTO TFT was greatly changed by a small difference in soft baking temperature($180{\sim}250^{\circ}C$). The performance of TFT was deteriorated as the soft baking temperature increased. Therefore, it is important to remove the water-related defects well as organic impurities from the ZTO films during soft baking for fabrication of solution-derived high performance of TFTs.

Assembly Modeling Framework for Thin-Film Transistors (조립형 박막 트랜지스터 모델링 프레임워크)

  • Jung, Taeho
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.3
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    • pp.59-64
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    • 2017
  • As the demand on displays increases, new thin-film transistors such as metal oxide transistor are continuously being invented. When designing a circuit consisting of such new transistors, a new transistor model based on proper charge transport mechanisms is needed for each of them. In this paper, a modeling framework which enables to choose charge transport mechanisms that are limited to certain operation regions and assemble them into a transistor model instead of making an integrated transistor model dedicated to each transistor. The framework consists of a graphic user interface to choose charge transport models and a current calculation part, which is also implemented in AIM-SPICE for circuit simulation.

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Passivation Layers for Organic Thin-film-transistors

  • Lee, Ho-Nyeon;Lee, Young-Gu;Ko, Ik-Hwan;Kang, Sung-Kee;Lee, Seong-Eui;Oh, Tae-Sik
    • Transactions on Electrical and Electronic Materials
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    • v.8 no.1
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    • pp.36-40
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    • 2007
  • Inorganic layers, such as SiOxNy and SiOx deposited using plasma sublimation method, were tested as passivation layer for organic thin-film-transistors (OTFTs). OTFTs with bottom-gate and bottom-contact structure were fabricated using pentacene as organic semiconductor and an organic gate insulator. SiOxNy layer gave little change in characteristics of OTFTs, but SiOx layer degraded the performance of OTFTs severely. Inferior barrier properties related to its lower film density, higher water vapor transmission rate (WVTR) and damage due to process environment of oxygen of SiOx film could explain these results. Polyurea and polyvinyl acetates (PVA) were tested as organic passivation layers also. PVA showed good properties as a buffer layer to reduce the damage come from the vacuum deposition process of upper passivation layers. From these results, a multilayer structure with upper SiOxNy film and lower PVA film is expected to be a superior passivation layer for OTFTs.

Characterization of channel length and width of p channel poly-Si thin film transistors (P channel poly-Si TFT의 길이와 두께에 관한 특성)

  • Lee, Jeoung-In;Hwang, Sung-Hyun;Jung, Sung-Wook;Jang, Kyung-Soo;Lee, Kwang-Soo;Chung, Ho-Kyoon;Choi, Byoung-Deog;Lee, Ki-Yong;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.87-88
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    • 2006
  • Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.

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Amorphous Indium-Tin-Zinc-Oxide (ITZO) Thin Film Transistors

  • Jo, Gwang-Min;Lee, Gi-Chang;Seong, Sang-Yun;Kim, Se-Yun;Kim, Jeong-Ju;Lee, Jun-Hyeong;Heo, Yeong-U
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.170-170
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    • 2010
  • Thin-film transistors (TFT) have become the key components of electronic and optoelectronic devices. Most conventional thin-film field-effect transistors in display applications use an amorphous or polycrystal Si:H layer as the channel. This silicon layers are opaque in the visible range and severely restrict the amount of light detected by the observer due to its bandgap energy smaller than the visible light. Therefore, Si:H TFT devices reduce the efficiency of light transmittance and brightness. One method to increase the efficiency is to use the transparent oxides for the channel, electrode, and gate insulator. The development of transparent oxides for the components of thin-film field-effect transistors and the room-temperature fabrication with low voltage operations of the devices can offer the flexibility in designing the devices and contribute to the progress of next generation display technologies based on transparent displays and flexible displays. In this thesis, I report on the dc performance of transparent thin-film transistors using amorphous indium tin zinc oxides for an active layer. $SiO_2$ was employed as the gate dielectric oxide. The amorphous indium tin zinc oxides were deposited by RF magnetron sputtering. The carrier concentration of amorphous indium tin zinc oxides was controlled by oxygen pressure in the sputtering ambient. Devices are realized that display a threshold voltage of 4.17V and an on/off ration of ${\sim}10^9$ operated as an n-type enhancement mode with saturation mobility with $15.8\;cm^2/Vs$. In conclusion, the fabrication and characterization of thin-film transistors using amorphous indium tin zinc oxides for an active layer were reported. The devices were fabricated at room temperature by RF magnetron sputtering. The operation of the devices was an n-type enhancement mode with good saturation characteristics.

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