• Journal of Industrial and Engineering Chemistry
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• v.67
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• pp.417-428
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• 2018

In this study, we fabricated hierarchically self-assembled thin films composed of graphene oxide (GO) sheets and gold nanoparticles (Au NPs) using the Langmuir-Blodgett (LB) and Langmuir-Schaefer (LS) techniques and investigated their gas-sensing performance. First, a thermally oxidized silicon wafer ($Si/SiO_2$) was hydrophobized by depositing the LB films of cadmium arachidate. Thin films of ligand-capped Au NPs and GO sheets of the appropriate size were then sequentially transferred onto the hydrophobic silicon wafer using the LB and the LS techniques, respectively. Several different films were prepared by varying the ligand type, film composition, and surface pressure of the spread monolayer at the air/water interface. Their structures were observed by scanning electron microscopy (SEM) and atomic force microscopy (AFM), and their gas-sensing performance for $NH_3$ and $CO_2$ was assessed. The thin films of dodecanethiol-capped Au NPs and medium-sized GO sheets had a better hierarchical structure with higher uniformity and exhibited better gas-sensing performance.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.05a
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• pp.651-652
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• 2010

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2010.11a
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• pp.547-548
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• 2010

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2011.06a
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• pp.737-738
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• 2011

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.111-113
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• 2007

Thermal conductivities of copper thin films on silicon wafer was obtained from temperature distribution on the surface of wafer measured by radiation thermometry, when sample was heated with constant temperature ate the both ends in a vacuum and dissipate heat by radiation heat transfer into an environment.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.99.2-99.2
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• 2010

This paper investigates the dependence of a-Si:H/c-Si passivation and heterojunction solar cell performances on various cleaning processes of silicon wafer and surface morphology. It is observed that passivation quality of a-Si:H thin-films on c-Si wafer highly depends on wafer surface conditions. The MCLT(Minority carrier life time) of wafer incorporating intrinsic (i) a-Si:H as a passivation layer shows sensitive variation with cleaning process and surface morpholgy. By applying improved cleaning processes and surface morphology we can obtain the MCLT of $200{\mu}sec$ after H-termination and above 1.5msec after i a-Si:H thin film deposition, which has implied open circuit voltage of 0.720V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.6
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• pp.512-518
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• 2006

In this paper, we investigated the deposition of pentacene thin film on a large area substrate by Organic Vapor Phase Deposition(OVPD) and applied it to fabrication of Organic Thin Film Transistor(OTFT). We extracted the optimum deposition conditions such as evaporation temperature of $260^{\circ}C$, carrier gas flow rate of 10 sccm and chamber vacuum pressure of 0.1 torr. We fabricated 72 OTFTs on the 4 inch size Si Wafer, Which produced the average mobility of $0.1{\pm}0.021cm^2/V{\cdot}s$, average subthreshold slope of 1.04 dec/V, average threshold voltage of -6.55 V, and off-state current is $0.973pA/{\mu}m$. The overall performance of pentacene TFTs over 4 ' wafer exhibited the uniformity with the variation less than 20 %. This proves that OVPD is a suitable methode for the deposition of organic thin film over a large area substrate.

• New & Renewable Energy
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• v.4 no.2
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• pp.68-73
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• 2008

It is very important that constitution of good hetero-junction interface with a high quality amorphous silicon thin films on very cleaned c-Si wafer for making high efficiency hetero-junction solar cells. For achieving the high efficiency solar cells, the inspection and management of c-Si wafer surface conditions are essential subjects. In this experiment, we analyzed the c-Si wafer surface very sensitively using Spectroscopic Ellipsometer for < ${\varepsilon}2$ > and u-PCD for effective carrier life time, so we accomplished < ${\varepsilon}2$ > value 43.02 at 4.25eV by optimizing the cleaning process which is representative of c-Si wafer surface conditions very well. We carried out that the deposition of high quality hydrogenated silicon amorphous thin films by RF-PECVD systems having high density and low crystallinity which are results of effective medium approximation modeling and fitting using spectroscopic ellipsometer. We reached the cell efficiency 12.67% and 14.30% on flat and textured CZ c-Si wafer each under AM1.5G irradiation, adopting the optimized cleaning and deposition conditions that we made. As a result, we confirmed that spectroscopic ellipsometry is very useful analyzing methode for hetero-junction solar cells which need to very thin and high quality multi layer structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.38-38
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• 2009

Wafer thickness of crystalline silicon is an important factor which decides a price of solar cell. PC1D was used to fix a condition that is required to get a high efficiency in a crystalline silicon solar cell using thin wafer($150{\mu}m$). In this simulation, base resistivity and emitter doping concentration were used as variables. As a result of the simulation, $V_{oc}$=0.6338(V), $I_{sc}$=5.565(A), $P_{max}$=2.674(W), FF=0.76 and efficiency 17.516(%) were obtained when emitter doping concentration is $5{\times}10^{20}cm^{-3}$, depth factor is 0.04 and sheet resistance is $79.76{\Omega}/square$.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1018-1021
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• 2003

A scratch tester was developed to evaluate the adhesive strength at interface between thin film and substrate(silicon wafer). Under force control, the scratch tester can measure the normal and the horizontal forces simultaneously as the probe tip of the equipment approaches to the interface between thin film and substrate of wafer. The capacity of each component of force sensor is 0.1 N ∼ 100 N. In addition, the tester can detect the signal of elastic wave from AE sensor(frequency range of 900 kHz) attached to the probe tip and evaluate the bonding strength of interface. Using the developed scratch tester. the feasibility test was performed to evaluate the adhesive strength of semiconductor wafer.