• Title/Summary/Keyword: Thin/thick film

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Comparison of Depth Profiles of CIGS Thin Film by Micro-Raman and XPS (마이크로 라만 및 XPS를 이용한 CIGS 박막의 두께방향 상분석 비교)

  • Beak, Gun Yeol;Jeon, Chan-Wook
    • Current Photovoltaic Research
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    • v.4 no.1
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    • pp.21-24
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    • 2016
  • Chalcopyrite based (CIGS) thin films have considered to be a promising candidates for industrial applications. The growth of quality CIGS thin films without secondary phases is very important for further efficiency improvements. But, the identification of complex secondary phases present in the entire film is crucial issue due to the lack of powerful characterization tools. Even though X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS) and normal Raman spectroscopy provide the information about the secondary phases, they provide insufficient information because of their resolution problem and complexity in analyzation. Among the above tools, a normal Raman spectroscopy is better for analysis of secondary phases. However, Raman signal provide the information in 300 nm depth of film even the thickness of film is > $1{\mu}m$. For this reason, the information from Raman spectroscopy can't represent the properties of whole film. In this regard, the authors introduce a new way for identification of secondary phases in CIGS film using depth Raman analysis. The CIGS thin films were prepared using DC-sputtering followed by selenization process in 10 min time under $1{\times}10^{-3}torr$ pressure. As-prepared films were polished using a dimple grinder which expanded the $2{\mu}m$ thick films into about 1mm that is more than enough to resolve the depth distribution. Raman analysis indicated that the CIGS film showed different secondary phases such as, $CuIn_3Se_5$, $CuInSe_2$, InSe and CuSe, presented in different depths of the film whereas XPS gave complex information about the phases. Therefore, the present work emphasized that the Raman depth profile tool is more efficient for identification of secondary phases in CIGS thin film.

High-Luminous Efficiency Full-Color Emitting $GdVO_4$:Eu, Er, Tm Phosphor Thin Films

  • Minami, Takatsugu;Miyata, Toshihiro;Mochizuki, Yuu
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1091-1094
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    • 2004
  • High-luminous efficiency full-color emissions in photoluminescence (PL) were obtained in $GdVO_4$ phosphor thin films co-doped with various amounts of Eu, Er and/or Tm and postannealed at approximately 1000$^{\circ}C$. The $GdVO_4$:Eu,Er,Tm phosphor thin films were deposited on thick $BaTiO_3$ ceramic sheets by r.f. magnetron sputtering using powder targets and postannealed in an air atmosphere. The rare earth (RE) content (RE/(Gd+V+RE) atomic ratio) in the oxide phosphor thin films was varied in the range from 0.1 to 2 at.%. It was found that the excitation of $GdVO_4$:Eu.Er,Tm thin films is attributed to band-to-band transition. A white PL emission was obtained in a $GdVO_4$:Eu,Er,Tm thin film with Eu, Er and Tm contents of 0.2, 0.7 and 1 at.%, respectively: CIE chromaticity color coordinates. (X=0.352 and Y=0.351). In addition, a white emission was obtained in a thin-film electroluminescent (TFEL) device made with this thin film.

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Effect of Thin-Film Thickness on Electrical Performance of Indium-Zinc-Oxide Transistors Fabricated by Solution Process (용액 공정을 이용한 IZO 트랜지스터의 전기적 성능에 대한 박막 두께의 영향)

  • Kim, Han-Sang;Kyung, Dong-Gu;Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.30 no.8
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    • pp.469-473
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    • 2017
  • We investigated the effect of different thin-film thicknesses (25, 30, and 40 nm) on the electrical performance of solution-processed indium-zinc-oxide (IZO) thin-film transistors (TFTs). The structural properties of the IZO thin films were investigated by atomic force microscopy (AFM). AFM images revealed that the IZO thin films with thicknesses of 25 and 40 nm exhibit an uneven distribution of grains, which deforms the thin film and degrades the performance of the IZO TFT. Further, the IZO thin film with a thickness of 30 nm exhibits a homogeneous and smooth surface with a low RMS roughness of 1.88 nm. The IZO TFTs with the 30-nm-thick IZO film exhibit excellent results, with a field-effect mobility of $3.0({\pm}0.2)cm^2/Vs$, high Ion/Ioff ratio of $1.1{\times}10^7$, threshold voltage of $0.4({\pm}0.1)V$, and subthreshold swing of $0.7({\pm}0.01)V/dec$. The optimization of oxide semiconductor thickness through analysis of the surface morphologies can thus contribute to the development of oxide TFT manufacturing technology.

Fabrication of Polycrystalline Si Films by Silicide-Enhanced Rapid Thermal Annealing and Their Application to Thin Film Transistors (Silicide-Enhanced Rapid Thermal Annealing을 이용한 다결정 Si 박막의 제조 및 다결정 Si 박막 트랜지스터에의 응용)

  • Kim, Jone Soo;Moon, Sun Hong;Yang, Yong Ho;Kang, Sung Mo;Ahn, Byung Tae
    • Korean Journal of Materials Research
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    • v.24 no.9
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    • pp.443-450
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    • 2014
  • Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.

Fabrication of oxide semiconductor thin film gas sensor array (산화물 반도체 박막 가스센서 어레이의 제조)

  • 이규정;김석환;허창우
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.4 no.3
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    • pp.705-711
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    • 2000
  • A thin film oxide semiconductor micro gas sensor array which shows only 60 mW of power consumption at an operating temperature of $300^{\circ}C$ has been fabricated using microfabrication and micromachining techniques. Excellent thermal insulation of the membrane is achieved by the use of a double-layer structure of $0.1\mum\; thick\; Si_3N_4 \;and\; 1 \mum$ thick phosphosilicate glass (PSG) prepared by low-pressure chemical-vapor deposition (LPCVD) and atmospheric-pressure chemical-vapor deposition (APCVD), respectively. The sensor array consists of such thin film oxide semiconductor sensing materials as 1 wt.% Pd-doped $SnO_2,\; 6 wt.% A1_2O_3-doped\; ZnO,\; WO_3$/ and ZnO. Baseline resistances of the four sensing materials were found to be stable after the aging for three days at $300^{\circ}C$. The thin film oxide semiconductor micro gas sensor array exhibited resistance changes usable for subsequent data processing upon exposure to various gases and the sensitivity strongly depended on the sensing layer materials.

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Fabrication and yield improvement of oxide semiconductor thin film gas sensor array (산화물 반도체 박막 가스센서 어레이의 제조 및 수율 개선)

  • 이규정;류광렬;허창우
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.2
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    • pp.315-322
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    • 2002
  • A thin film oxide semiconductor micro gas sensor array which shows only 60㎽ of power consumption at an operating temperature of 30$0^{\circ}C$ has been fabricated using microfabrication and rnicrornachining techniques. Excellent thermal insulation of the membrane is achieved by the use of a double la! or structure of 0.1${\mu}{\textrm}{m}$ thick Si$_3$N$_4$ and 1${\mu}{\textrm}{m}$ thick phosphosilicate glass(PSG) prepared by low pressure chemical vapor deposition(LPCVD) and atmospheric-pressure chemical-vapor deposition(APCVD), respectively. The sensor way consists of such thin film oxide semiconductor sensing materials as 1wt.% Pd-doped SnO$_2$, 6wt.% AI$_2$O$_3$-doped ZnO, WO$_3$ and ZnO. The thin film oxide semiconductor micro gas sensor array exhibited resistance changes usable for subsequent data processing upon exposure to various gases and the sensitivity strongly depended on the sensing layer materials. Heater Part of the sensor structure has been modified in order to improve the process yield of the sensor, and as a result of modified heater structure improved process yield has been achieved.

Thin Film (La0.7Sr0.3)0.95MnO3-δ Fabricated by Pulsed Laser Deposition and Its Application as a Solid Oxide Fuel Cell Cathode for Low-Temperature Operation

  • Noh, Ho-Sung;Son, Ji-Won;Lee, Heon;Kim, Hae-Ryoung;Lee, Jong-Ho;Lee, Hae-Weon
    • Journal of the Korean Ceramic Society
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    • v.47 no.1
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    • pp.75-81
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    • 2010
  • The feasibility of using the thin film technology in utilizing lanthanum strontium manganite (LSM) for a solid oxide fuel cell (SOFC) cathode in a low-temperature regime is investigated in this study. Thin film LSM cathodes were fabricated using pulsed laser deposition (PLD) on anode-supported SOFCs with yttria-stabilized zirconia (YSZ) electrolytes. Although cells with a 1 ${\mu}m$-thick LSM cathode showed poor low-temperature cell performance compared to that of a cell with a bulk-processed cathode due to the lack of a triple-phase boundary length, the cell with 200 nm-thick gadolinia-doped ceria (GDC) inserted between the LSM and YSZ showed enhanced performance and more stable operation characteristics in a comparison of a cell without a GDC layer. We postulate that the GDC layer likely improved the cathode adhesion, therefore contributing to the improvement of the cell performance instead of serving as an interfacial reaction buffer.

Thermal Property Evaluation of a Silicon Nitride Thin-Film Using the Dual-Wavelength Pump-Probe Technique (2파장 펌프-프로브 기법을 이용한 질화규소 박막의 열물성 평가)

  • Kim, Yun Young
    • Korean Journal of Materials Research
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    • v.29 no.9
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    • pp.547-552
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    • 2019
  • In the present study, the thermal conductivity of a silicon nitride($Si_3N_4$) thin-film is evaluated using the dual-wavelength pump-probe technique. A 100-nm thick $Si_3N_4$ film is deposited on a silicon (100) wafer using the radio frequency plasma enhanced chemical vapor deposition technique and film structural characteristics are observed using the X-ray reflectivity technique. The film's thermal conductivity is measured using a pump-probe setup powered by a femtosecond laser system of which pump-beam wavelength is frequency-doubled using a beta barium borate crystal. A multilayer transient heat conduction equation is numerically solved to quantify the film property. A finite difference method based on the Crank-Nicolson scheme is employed for the computation so that the experimental data can be curve-fitted. Results show that the thermal conductivity value of the film is lower than that of its bulk status by an order of magnitude. This investigation offers an effective way to evaluate thermophysical properties of nanoscale ceramic and dielectric materials with high temporal and spatial resolutions.

The Effects of Nanocrystalline Silicon Thin Film Thickness on Top Gate Nanocrystalline Silicon Thin Film Transistor Fabricated at 180℃

  • Kang, Dong-Won;Park, Joong-Hyun;Han, Sang-Myeon;Han, Min-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.111-114
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    • 2008
  • We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.