• Title/Summary/Keyword: Technological Processor

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Optimization of Ball End Milling Feedrate considering Variation of Slopes in the CNC Machining of Sculptured Surfaces (자유곡면의 경사도에 따른 볼엔드밀링 이송속도의 최적화 연구)

  • Maeng, Hee-young;Yoon, Jang-sang
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2003.04a
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    • pp.209-214
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    • 2003
  • This study presents the analysis of ball end milling machinability and its application to the determination of the optimum feedrate in the CNC machining process of sculptured surface. The methods which estimate the cutting force system is approached experimentally. The estimation strategy, named technological processor, was applied to the machining process of sculptured surface for finding optimum variable feedrate. From the result of practical implementation for the test model, it is ascertain that the technological processor have brought the dispersion of force profiles. As compared with conventional imposing of cutting conditions, the machining time has reduced by more than 60%.

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On the Development of 3D Finite Element Method Package for CEMTool

  • Park, Jung-Hun;Ahn, Choon-Ki;Kwon, Wook-Hyun
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.2410-2413
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    • 2005
  • Finite element method (FEM) has been widely used as a useful numerical method that can analyze complex engineering problems in electro-magnetics, mechanics, and others. CEMTool, which is similar to MATLAB, is a command style design and analyzing package for scientific and technological algorithm and a matrix based computation language. In this paper, we present new 3D FEM package in CEMTool environment. In contrast to the existing CEMTool 2D FEM package and MATLAB PDE (Partial Differential Equation) Toolbox, our proposed 3D FEM package can deal with complex 3D models, not a cross-section of 3D models. In the pre-processor of 3D FEM package, a new 3D mesh generating algorithm can make information on 3D Delaunay tetrahedral mesh elements for analyses of 3D FEM problems. The solver of the 3D FEM package offers three methods for solving the linear algebraic matrix equation, i.e., Gauss-Jordan elimination solver, Band solver, and Skyline solver. The post-processor visualizes the results for 3D FEM problems such as the deformed position and the stress. Consequently, with our new 3D FEM toolbox, we can analyze more diverse engineering problems which the existing CEMTool 2D FEM package or MATLAB PDE Toolbox can not solve.

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Cytokine Information System and Pathway Visualization

  • Shengyang, Tan;Keong, Kwoh-Chee
    • Proceedings of the Korean Society for Bioinformatics Conference
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    • 2005.09a
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    • pp.10-14
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    • 2005
  • In this paper, we highlight the development of a web application system. Its main objective is to provide pathway visualization functionalities for inter-cytokine relationships, as well as for other types of relationships, with a specific cytokine(s) of interest. A natural language processor is first used to extract information from a certain web page that concerns the cytokine(s) of interest. The results obtained are then further processed and then displayed graphically to the user. The system displays how the cytokine(s) of interest interacts with other cytokines and cells. Useful information such as the type of reaction and catalyst involved, if any, are also displayed. In addition, the system also offers functionalities for graphical manipulations of the visualized pathways. The system has been shown to provide better overview, and hence, improved learning to readers who are new to this field by virtue of accurate inputs obtained from the natural language processing module.

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Performance Study of genus 3 Hyperelliptic Curve Cryptosystem

  • Gupta, Daya;De, Asok;Chatterjee, Kakali
    • Journal of Information Processing Systems
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    • v.8 no.1
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    • pp.145-158
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    • 2012
  • Hyperelliptic Curve Cryptosystem (HECC) is well suited for all kinds of embedded processor architectures, where resources such as storage, time, or power are constrained due to short operand sizes. We can construct genus 3 HECC on 54-bit finite fields in order to achieve the same security level as 160-bit ECC or 1024-bit RSA due to the algebraic structure of Hyperelliptic Curve. This paper explores various possible attacks to the discrete logarithm in the Jacobian of a Hyperelliptic Curve (HEC) and addition and doubling of the divisor using explicit formula to speed up the scalar multiplication. Our aim is to develop a cryptosystem that can sign and authenticate documents and encrypt / decrypt messages efficiently for constrained devices in wireless networks. The performance of our proposed cryptosystem is comparable with that of ECC and the security analysis shows that it can resist the major attacks in wireless networks.

ETRI AI Strategy #2: Strengthening Competencies in AI Semiconductor & Computing Technologies (ETRI AI 실행전략 2: AI 반도체 및 컴퓨팅시스템 기술경쟁력 강화)

  • Choi, S.S.;Yeon, S.J.
    • Electronics and Telecommunications Trends
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    • v.35 no.7
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    • pp.13-22
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    • 2020
  • There is no denying that computing power has been a crucial driving force behind the development of artificial intelligence today. In addition, artificial intelligence (AI) semiconductors and computing systems are perceived to have promising industrial value in the market along with rapid technological advances. Therefore, success in this field is also meaningful to the nation's growth and competitiveness. In this context, ETRI's AI strategy proposes implementation directions and tasks with the aim of strengthening the technological competitiveness of AI semiconductors and computing systems. The paper contains a brief background of ETRI's AI Strategy #2, research and development trends, and key tasks in four major areas: 1) AI processors, 2) AI computing systems, 3) neuromorphic computing, and 4) quantum computing.

Expert System for Assemblability of Products based on the Assembly Feature in Screwing (나사작업에 있어서의 조립형상 특징을 기초로 한 조립용이화 제품설계 전문가시스템 개발)

  • Mok, Hak-Soo;Kim, Gyung-Yun;Lee, Jae-Cheol
    • Journal of Korean Institute of Industrial Engineers
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    • v.20 no.4
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    • pp.153-180
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    • 1994
  • The assemblability is determined by the structure of product and the relationship between composing parts and machining parts. In this paper, the bolt was divided into bolt-head, -shaft, -thread and -end. For higher assemblability in bolting process, it was analyzed the geometric and technological characteristics of bolts were analysed regarding pre- and in-assembly process. And this paper presents the knowledge-based expert system to assist for designer in the processor of designing bolt for easier assembly. The developed expert system for supporting bolt design assemblability which is named as BDFA SYSTEM consists of two system such as "BOLT DESIGN SYSTEM" which provide feasible assembly bolt design to designer and "EVALUATION SYSTEM" which provide assembly evaluation to alternative of bolt design.

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A Comparison on the Efficiency of Data Mining Softwares (데이터마이닝 소프트웨어의 기능 및 효율성 비교에 관한 사례연구)

  • 한상태;강현철;이성건;이덕기
    • The Korean Journal of Applied Statistics
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    • v.15 no.2
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    • pp.201-211
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    • 2002
  • Data is being generated at an ever increasing rate in recent years, mainly due to technological advances in system architecture, processor speed, and storage structures. In this respect, data mining has attracted considerable attention and many commercial softwares for data mining have been developed. In this study, we compare the differences of functions and efficiency of application about several commercial data mining softwares which are widely used in real field.

The Study on the technological development of the Automatic defect testing system by using the very high speed linescan method (초고속 LINESCAN 방식의 자동 결함 검출 시스템 기술개발에 관한 연구)

  • Lee, Kyu-Hun;Kim, Yong;Kim, Hee-Tae;Eom, Ki-Bok;Won, Hye-Kyung
    • Proceedings of the KIEE Conference
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    • 2001.10a
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    • pp.219-223
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    • 2001
  • This paper proposed the Automatic defect testing technology which used in the defect test of printed things and external shapes in the precision industry. According to adapting the very high speed image processor called ASIC for high resolution. This system also realized that the System being able to perform the very high speed resolution testing. As the image processing algorithm, Run-length coding, Multi-level threshold and fast-adaptive line matching were applied.

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Calibration and Validation System for Synthetic Aperture Radar Satellite (영상레이더 위성을 위한 검보정 시스템)

  • Shin, Jae-Min;Jeong, Ho-Ryung;Lee, Kwang-Jae
    • Current Industrial and Technological Trends in Aerospace
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    • v.8 no.2
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    • pp.98-104
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    • 2010
  • The demand for Satellite Images is continuously increasing owing to the various applications of optical satellite images. However, the acquisition of optical images has a limitation due to problems of weather and day & night. because an optical satellite makes images with reflections of sunlight. Therefore, SAR Satellite, which uses electromagnetic waves to make an image, gives increased demand to various applications. It also makes increased interest. In this paper, a calibration and validation system, which is an essential element for high quality Radar images, is studied.

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On-Demand Remote Software Code Execution Unit Using On-Chip Flash Memory Cloudification for IoT Environment Acceleration

  • Lee, Dongkyu;Seok, Moon Gi;Park, Daejin
    • Journal of Information Processing Systems
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    • v.17 no.1
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    • pp.191-202
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    • 2021
  • In an Internet of Things (IoT)-configured system, each device executes on-chip software. Recent IoT devices require fast execution time of complex services, such as analyzing a large amount of data, while maintaining low-power computation. As service complexity increases, the service requires high-performance computing and more space for embedded space. However, the low performance of IoT edge devices and their small memory size can hinder the complex and diverse operations of IoT services. In this paper, we propose a remote on-demand software code execution unit using the cloudification of on-chip code memory to accelerate the program execution of an IoT edge device with a low-performance processor. We propose a simulation approach to distribute remote code executed on the server side and on the edge side according to the program's computational and communicational needs. Our on-demand remote code execution unit simulation platform, which includes an instruction set simulator based on 16-bit ARM Thumb instruction set architecture, successfully emulates the architectural behavior of on-chip flash memory, enabling embedded devices to accelerate and execute software using remote execution code in the IoT environment.