• Journal of the Optical Society of Korea
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• v.3 no.2
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• pp.74-79
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• 1999

We present a simple design rule for a passive temperature-compensating optical package. We also present experimentally that a package fabricated by using the design rule compensates the temperature dependence of the resonant wavelength of an optical long period fiber grating by varying the strain inside the fiber, The package fabricated in this work consists of two pieced of brass tube, 10 mm long, and a piece of nylon rod, 45.4 mm long. It is shown that the package can compensate the temperature-induce wavelength shifts of the long period grating to a range of 6.8 pm/$^{\circ}C$, compared with 0..48 nm/$^{\circ}C$ for an uncompensated grating. The reduced strength of the fiber caused by exposure to ultraviolet limits the performance of the package to the range operating temperature form -3 $^{\circ}C$ to 7$0^{\circ}C$.

• Transactions on Electrical and Electronic Materials
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• v.2 no.3
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• pp.28-32
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• 2001

It was studied in the present work how the thermal cycling performance of LOC (lead on chip) packages depends on the package construct or leadframe materials. First, package body thickness and Au wire diameter were manipulated for the selection of proper package design. Secondly, two different types of leadframe materials (i.e. copper and 52%Fe-48%Ni alloy) were tested to determine the better material for improved reliability margin of plastically encapsulated microelectronic packages. This work shows that manipulating package body thickness was more effective than an increase of Au wire from 23$\mu\textrm{m}$ to 33$\mu\textrm{m}$ for the prevention of wire debonding failure. Further, this work indicates that the LOC packages including the copper leadframes can be more susceptible to thermal cycling reliability degradation due to chip cracking than those including the alloy leadframes.

• Electronics and Telecommunications Trends
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• v.35 no.2
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• pp.89-103
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• 2020

Knowledge of the technology, characteristics, and market trends of the latest CPUs used in smartphones, computers, and supercomputers and the research trends of leading US university experts gives an edge to policy-makers, business executives, large investors, etc. To this end, we describe three topics in detail at a level that can help educate the non-majors to the extent possible. Topic 1 comprises the design and manufacture of a CPU and the technology and trends of the smartphone SoC. Topic 2 comprises the technology and trends of the x86 CPU and supercomputer, and Topic 3 involves an optical network chip that has the potential to emerge as a major semiconductor chip. We also describe three techniques and experiments that can be used to implement the optical network chip.

• Electronics and Telecommunications Trends
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• v.35 no.2
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• pp.120-136
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• 2020

Knowledge of the technology, characteristics, and market trends of the latest CPUs used in smartphones, computers, and supercomputers and the research trends of leading US university experts gives an edge to policy-makers, business executives, large investors, etc. To this end, we describe three topics in detail at a level that can help educate the non-majors to the extent possible. Topic 1 comprises the design and manufacture of a CPU and the technology and trends of the smartphone SoC. Topic 2 comprises the technology and trends of the x86 CPU and supercomputer, and Topic 3 involves an optical network chip that has the potential to emerge as a major semiconductor chip. We also describe three techniques and experiments that can be used to implement the optical network chip.

• Electronics and Telecommunications Trends
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• v.35 no.2
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• pp.104-119
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• 2020

Knowledge of the technology, characteristics, and market trends of the latest CPUs used in smartphones, computers, and supercomputers and the research trends of leading US university experts gives an edge to policy-makers, business executives, large investors, etc. To this end, we describe three topics in detail at a level that can help educate the non-majors to the extent possible. Topic 1 comprises the design and manufacture of a CPU and the technology and trends of the smartphone SoC. Topic 2 comprises the technology and trends of the x86 CPU and supercomputer, and Topic 3 involves an optical network chip that has the potential to emerge as a major semiconductor chip. We also describe three techniques and experiments that can be used to implement the optical network chip.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.441-444
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• 1996

Object-oriented programming goes on increasing in many areas, as its advantages of flexibility and ease of maintenance have been recognized. As in usual programmings, the productivity and flexibility of CACSD package can be improved by adopting object-oriented programmin. This paper describes our efforts to implement an OO-CACSD(Object Oriented CACSD) package for control system design and simulation. Since the proposed OO-CACSD is based on the modularity, portability, reuseability, and matrix-oriented data structure, a control system can be not only modeled and simulated but also maintained easily.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.139-149
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• 2012

A 3D stacked IC is made by multiple dies (possibly) with heterogeneous process technologies. Therefore, die-to-die variation in 2D chips renders on-package variation (OPV) in a 3D chip. In spite of the different variation effect in 3D chips, generally, 3D die stacking can produce high yield due to the smaller individual die area and the averaging effect of variation on data path. However, 3D clock network can experience unintended huge clock skew due to the different clock propagation routes on multiple stacked dies. In this paper, we analyze the on-package variation effect on 3D clock networks and show the necessity of a post silicon management method such as body biasing technique for the OPV induced 3D clock skew control in 3D stacked IC designs. Then, we present a parametric yield improvement method to mitigate the OPV induced 3D clock skew.

• Proceedings of the KSRS Conference
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• 2002.10a
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• pp.49-52
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• 2002

High-resolution satellite image processing software should be able to ensure accurate, fast, compact data processing in offline or online environment. In this paper, component software for high-resolution satellite image processing is developed using OpenGIS components and real-time data processing architecture. The developed component software is composed of three major packages, which are data provide package, user interface package, and fast data processing package. The data provider package encodes and decodes diverse image/vector data formats and give identical data access methods to developers. The user interface package supports menus, toolbars, dialogs, and events to use easier. The fast data processing package follows the OpenGIS's data processing standards, which can deal with several processors as components with standard procedural functionalities.

• Journal of the Semiconductor & Display Technology
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• v.14 no.3
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• pp.57-60
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• 2015

Electric power in large devices is controlled by digital circuits, such as switching mode power supply. This kind of power circuits require accurate current sensor for power distribution. We studied characteristics of shunt resistor, which has many advantages for commercial application compared to Hall-effect current sensor. We applied ceramic package to the shunt resistor. Ceramic package has good thermal conductivity compared to plastic package, and this point is important for space requirement in Printed Circuit Board (PCB). Another advantage of the ceramic package is that surface mount technology (SMT) can be used for production. Our experimental results showed that the ceramic packaged resistor showed about 50% lower temperature than the plastic packaged one. Burning point and frequency characteristics are also discussed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.149-158
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• 1995

This paper describes the development of a software tool LCD FRAME that may guide the analyzing process for the electrical characteristics and the design procedure for constructing the thin film transistor liquid crystal display(TFT/LCD) packages. LCD FRAME can analyze its electrical characteristics from the TFT/LCD system package configuration, and provide the design variables to meet the user's requirements. These analysis and design procedure can be done in real time according to the model at simplified package level of TFT/LCD. LCD_FRAME is an object-oriented expert system which considers package elements as objects. With this LCD_FRAME software tool, we analyzed the I-V characteristics of a-Si TFT and its signal distortion which has maximum 1.58 $\mu$s delay along the panel scan line of the package containing 480 ${\times}$ 240 pixels. We designed the package structure of maximum 6.35 $\mu$s signal delays and 3360 ${\times}$ 780 pixels, and as a result we showed that the proper structure of 20 $\mu$m scan line width, 60$\mu$m panel TFT gate width and 8 $\mu$m gate length. This LCD_FRAME software tool provides results of the analysis and the design in the form of input files of the SPICE program, text data files, and graphic charts.