• Title/Summary/Keyword: System in Package

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An Experimental Study on The Coupling Path and Acoustic Modal Characteristics of Passenger Compartment - Trunk Coupled System (차실-트렁크 연성계의 연성경로 및 음향모드 특성에 관한 실험적 연구)

  • Kim, Gyoo-Beom;Lee, Jin-Woo;Lee, Jang-Moo;Kim, Seock-Hyun;Park, Dong-Chul
    • Proceedings of the KSME Conference
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    • 2000.11a
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    • pp.607-611
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    • 2000
  • Acoustic modal property of the vehicle passenger compartment is a very important factor which dominates vehicle interior noise in the low frequency range. In most real cars, trunk noise often transfers into the passenger compartment since the two cavities are acoustically coupled. This study identifies the major coupling path by examining the variation of the coupled acoustic modal frequencies and modes. An 1/2 size acryl compartment model is designed and manufactured for the measurement and analysis of coupled acoustic modes. Experimental result shows that package tray contributes to the coupling much more than the back seat and hole size of the package tray is an important design factor to control low frequency acoustic modes in the coupled system.

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Design Procedure for System in Package (SIP) Business

  • Kwon, Heung-Kyu
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.09a
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    • pp.109-119
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    • 2003
  • o In order to start SIP Project .Marketing (& ASIC team) should present biz planning, schedule, device/SIP specs., in SIP TFT prior to request SIP development for package development project. .In order to prevent (PCB) revision, test, burn-in, & quality strategy should be fixed by SIP TFT (PE/Test, QA) prior to request for PKG development. .Target product price/cost, package/ test cost should be delivered and reviewed. o Minimum Information for PCB Design, Package Size, and Cost .(Required) package form factor: size, height, type (BGA, QFP), Pin count/pitch .(Estimated) each die size including scribe lane .(Estimated) pad inform. : count, pitch, configuration(in-line/staggered), (open) size .(Estimated) each device (I/O & Core) power (especially for DRAM embedded SIP) .SIP Block diagram, and net-list using excel sheet format o Why is the initial evaluation important\ulcorner .The higher logic power resulted in spec. over of DRAM Tjmax. This caused business drop longrightarrow Thermal simulation of some SIP product is essential in the beginning stage of SIP business planning (or design) stage. (i.e., DRAM embedded SIP) .When SIP is developed using discrete packages, the I/O driver Capa. of each device may be so high for SIP. Since I/O driver capa. was optimized to discrete package and set board environment, this resulted in severe noise problem in SIP. longrightarrow In this case, the electrical performance of product (including PKG) should have been considered (simulated) in the beginning stage of business planning (or design).

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A Case Study on Character Package Design of Japan (일본의 캐릭터패키지디자인 사례분석)

  • You, Hyun-Bea
    • Journal of Digital Contents Society
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    • v.18 no.1
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    • pp.47-54
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    • 2017
  • In this research, I analyze cases of character packages in Japane, extract the concept of design that was loved by consumers and inmates and succeeded in marketing, and aim to establish the logic and principle. In addition, in the future, when introducing and utilizing the character package design in Korea, this research intends to make a guideline for the development of objective validity and empathic package design. After identifying the design concept and finding the principle by targeting package design of five character of Tohato which mixed various media and expanded sales, I want to find out the cause of success. Therefore, I have studied the theory and principles of enterprise and creative in product strategy through case analysis of character design concept and character package design. As a result, a design that leaving the functional side, having a story, making memories, and inducing a sense of closeness was as a successful case of renewal. In the package design, in some cases, package design execution is more important under the theoretical system according to consumer behavior analysis and Promotion of bold design concept of the design for the success of that concept, deviated from the existing principle.

The study on the development of phase shifter of FBAR(Film Bulk Acoustic Reonator) Duplexer using photo lithograry (후막 리소그라피 공정을 이용한 FBAR Duplexer용 phase shifter 개발에 관한 연구)

  • Yoo, Joshua;Yoo, M.J.;Kim, Erick;Lee, W.S.;Park, J.C.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.768-771
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    • 2003
  • Nowadays, the study on the ceramic components and modules used in telecommunication system is being performed. Duplexer is the one of the most important components and has the role of dividing Rx and Tx signal. Duplexer including the FBAR is being done vigorously LTCC is used for package like SAW package, duplexer package. In our research, LTCC material is used for FBAR duplexer package and photo-lithography for the fine line phase shifter. The good characteristics, low loss and good isolation, of duplexer is obtained by the fine line phase shifter having high characteristic impedance of stripline.

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Giga-Hertz-Level Electromagnetic Field Analysis for Equivalent Inductance Modeling of High-Performance SoC and SiP Designs

  • Yao Jason J.;Chang Keh-Jeng;Chuang Wei-Che;Wang, Jimmy S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.4
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    • pp.255-261
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    • 2005
  • With the advent of sub-90nm technologies, the system-on-chip (SoC) and system-in-package (SiP) are becoming the trend in delivering low-cost, low-power, and small-form-factor consumer electronic systems running at multiple GHz. The shortened transistor channel length reduces the transistor switching cycles to the range of several picoseconds, yet the time-of-flights of the critical on-chip and off-chip interconnects are in the range of 10 picoseconds for 1.5mm-long wires and 100 picoseconds for 15mm-long wires. Designers realize the bottleneck today often lies at chip-to-chip interconnects and the industry needs a good model to compute the inductance in these parts of circuits. In this paper we propose a new method for extracting accurate equivalent inductance circuit models for SPICE-level circuit simulations of system-on-chip (SoC) and system-in-package (SiP) designs. In our method, geometrical meshes are created and numerical methods are used to find the solutions for the electromagnetic fields over the fine meshes. In this way, multiple-GHz SoC and SiP designers can use accurate inductance modeling and interconnect optimization to achieve high yields.

A Study on the Recycling Package Design (재활용 포장디자인의 연구 - 마케팅을 중심으로 -)

  • 재활용
    • Archives of design research
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    • v.21
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    • pp.139-147
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    • 1997
  • The concept of package in these day is getting changing with fluctuation of living and management circumstance. The is due to society trancefiguration and change of economic structure and induced to appear small paxkage. These package trend to covert from the class management to total management system and these system made a promotion to development current industry. In these day, with the development of industry and the progress of the life , the package is performing the first faculty such as perservation of manufacture, convenience of keeping and loading in , expedition of sale and additionally the role of package in modern economy is significant for the essen tial element of enterprise prosperity by improving its shape color and materials. It is readilly appearent to anyone in the recycling field that stable markets for collected materials are vitals to any successful program. The recycling movement has increased in popularity throughout the any country: however, it has brought with it a market for them. This attitute also prevails in the political arena where atates or municipalities who are committed to recycling major portion of the solid waste stream are asking these same question regarding the disposition of thte recycled material.

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Implementation of Real Time Multi-User Communication System with MPEG-4 CELP (MPEG-4 CELP를 이용한 실시간 다자간 통신시스템의 구현)

  • 김헌중;우광희;차형태
    • The Journal of the Acoustical Society of Korea
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    • v.19 no.3
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    • pp.57-62
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    • 2000
  • In recent, the innovative improvement of a internet and computing environment make users desire the capability of processing information in real time. In this paper we implement a PC-to-PC real time multi-user communication system on the internet environment using the efficient algorithm for a real time processing and the MFEG-4 CELP codec which can be used for a low bit-rate coding from 6 to 24kbps. The implemented system produces a compressed bit-streams with the MPEG-4 CEU Mode-I 18200bps mode. There is 5 frames for a package and 1 frame has 160 samples. We can use this system to communicate with 4 users simultaneously in real time. The system is designed and examined on the Windows operating system.

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A Study on Architecture of Test Program based UML (UML 기반 점검 프로그램 설계 방법에 관한 연구)

  • Kim, ByoungYong;Jang, JungSu;Ban, ChangBong;Lee, HyoJong;Yang, SeungYul
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.217-230
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    • 2012
  • This paper propose interacting test programming methods between test equipment and hardware unit to verify function and performance of the hardware unit under test. Proposed test program can minimizes the risk of failures when the unit is mounted on the aircraft by testing and verifying the unit under the worst stress condition. Also, Object oriented design using UML make it easy to apply in other equipments. Test program consists of architecture package and hardware package. Architecture package is in a role for system management, log analysis, message receiving and message analysis. Messages that are used by system management define messages for testing and defined messages is sent and received to test equipment through Ethernet. Hardware package is in a role for hardware management that is needed to be tested and is related to a system. Hardware to be tested is divided into internal test and transmission test. Internal test inspects hardware itself and reports the test results to the test equipment. Transmission test inspects communication device by sending or receiving data. All kinds of test is done in the worst condition of the test unit executing in parallel. Each device is tested at least 482 times and at most 15,003 times about one hour. Test program is utilized in hardware reliability test like as environmental test or EMI test.

Study on the Development for Low Noise Indoor Unit Package Air-Conditioner (저소음 패키지형 공기조화기의 실내기 개발에 관한 연구)

  • 이재효;조성철;김태헌
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.15 no.6
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    • pp.518-523
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    • 2003
  • The purpose of this study was to reduce the noise emitted from the package air-conditioner. The optimum design methods of the fans ware investigated experimentally through the analysis of noise problem caused by the conventional PAC system. New PAC system had decreased 6 dBA in overall noise level as compared with the conventional system by various technology.

Development of Seam Seal Welding System for Semiconductor Package (반도체 Package용 Seam Seal Welding System 개발)

  • 이우영;진경복;오장환;김경수
    • Journal of the Semiconductor & Display Technology
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    • v.2 no.2
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    • pp.21-24
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    • 2003
  • Seam seal welding on the semiconductor package is a process for sealing the packages of semi-conductors, crystal parts, saw filters and oscillators with lid plate by seam welding. This paper presents the development process of automatic seam seal welding system. In this process, the process algorithm, high precision welding current control, design of welding head, high speed and high precision feeding mechanism and user interface process control program technologies are included.

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