• 제목/요약/키워드: System Level Design

검색결과 4,209건 처리시간 0.039초

3-레벨 인버터 UPFC의 제어기설계와 동특성해석 (Controller Design and Dynamic Performance Analysis of UPFC based on 3-Level Inverters)

  • 한병문
    • 대한전기학회논문지:전력기술부문A
    • /
    • 제49권6호
    • /
    • pp.272-279
    • /
    • 2000
  • This paper describes a controller design and dynamic performance analysis of UPFC based on 3-level inverters. Major attention is focused on the controller design for both shunt and series inverters, including regulator design for the dc link voltage sharing across the dc capacitors. An energy-based approach was investigated for effectively designing the controller. A detailed UPFC model has been developed with EMTP using 24-pulse 3-level inverters to verify this approach. Simulation results about dynamic performance of UPFC confirm effects for increasing transmission capacity and damping low-frequency oscillation. The developed simulation model would be very effective to analyze the dynamic performance of UPFC.

  • PDF

다중 프로세서 칩을 위한 시스템 제어 장치의 구조설계 및 FPGA 구현 (Architecture design and FPGA implementation of a system control unit for a multiprocessor chip)

  • 박성모;정갑천
    • 전자공학회논문지C
    • /
    • 제34C권12호
    • /
    • pp.9-19
    • /
    • 1997
  • This paper describes the design and FPGA implementation of a system control unit within a multiprocessor chip which can be used as a node processor ina massively parallel processing (MPP) caches, memory management units, a bus unit and a system control unit. Major functions of the system control unit are locking/unlocking of the shared variables of protected access, synchronization of instruction execution among four integer untis, control of interrupts, generation control of processor's status, etc. The system control unit was modeled in very high level using verilog HDL. Then, it was simulated and verified in an environment where trap handler and external interrupt controller were added. Functional blocks of the system control unit were changed into RTL(register transfer level) model and synthesized using xilinx FPGA cell library in synopsys tool. The synthesized system control unit was implemented by Xilinx FPGA chip (XC4025EPG299) after timing verification.

  • PDF

다단계 최적화 수법을 이용한 열원 설비 설계법에 관한 연구 (A Study on the Multi-level Optimization Method for Heat Source System Design)

  • 유민경;남유진
    • 설비공학논문집
    • /
    • 제28권7호
    • /
    • pp.299-304
    • /
    • 2016
  • In recent years, heat source systems which have a principal effect on the performance of buildings are difficult to design optimally as a great number of design factors and constraints in large and complicated buildings need to be considered. On the other hand, it is necessary to design an optimum system combination and operation planning for energy efficiency considering Life Cycle Cost (LCC). This study suggests a multi-level and multi-objective optimization method to minimize both LCC and investment cost using a genetic algorithm targeting an office building which requires a large cooling load. The optimum method uses a two stage process to derive the system combination and the operation schedule by utilizing the input data of cooling and heating load profile and system performance characteristics calculated by dynamic energy simulation. The results were assessed by Pareto analysis and a number of Pareto optimal solutions were determined. Moreover, it was confirmed that the derived operation schedule was useful for operating the heat source systems efficiently against the building energy requirements. Consequently, the proposed optimization method is determined by a valid way if the design process is difficult to optimize.

설계 요건 중심의 인간-시스템 인터페이스 개발 프로세스 (Design Requirements-Driven Process for Developing Human-System Interfaces)

  • 함동한
    • 대한안전경영과학회지
    • /
    • 제10권1호
    • /
    • pp.83-90
    • /
    • 2008
  • Development of human-system interfaces (HSI) supporting the interaction between human and automation-based systems, particularly safety-critical sociotechnial systems, entails a wide range of design and evaluation problems. To help HSI designers deal with these problems, many methodologies from traditional human-computer interaction, software engineering, and systems engineering have been applied; however, they have been proved inadequate to develop cognitively well engineered HSI. This paper takes a viewpoint that HSI development is itself a cognitive process consisting of various decision making and problem solving activities and then proposes a design requirements-driven process for developing HSI. High-level design problems and their corresponding design requirements for visual information display are explained to clarify the concept of design requirements. Lastly, conceptual design of software system to support the requirements-driven process and designers' knowledge management is described.

디지털제어시스템의 물리계층 통신 프로토콜 설계 (Design of a Communication Protocol for the Physical Layer of the Digital Control System)

  • 이성우
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2000년도 하계학술대회 논문집 D
    • /
    • pp.2419-2422
    • /
    • 2000
  • A distributed real-time system that is being used now is usually divided into three level : higher level, middle level, and lower level. The higher level network is usually called an information network, the middle level is called a control network, and the lower level is called a field network or a divice network. This dissertation suggests and implements a middle level network which is called PICNET-NP (Plant Implementation and Control Network for Nuclear Power Plant). PICNET-NP is based partly on IEEE 802.4 token-passing bus access methed and partly on IEEE 802.3 physical layer. For this purpose a new interface, a physical layer service translater, is introduced. A control network using this method is implemented and applied to a distributed real-time system.

  • PDF

원자력 발전소 분산제어시스템의 통신 프로토콜 설계 (Design of a Communication Protocol for the Distributed Control System of the Nuclear Power Plants)

  • 이성우;윤명현;문홍주;이병윤
    • 한국에너지공학회:학술대회논문집
    • /
    • 한국에너지공학회 1999년도 추계 학술발표회 논문집
    • /
    • pp.143-148
    • /
    • 1999
  • A distributed real-time system that is being wed now is usually divided into three level : higher level, middle level, and lower level. The higher level network is usually called an information network, the middle level is called a control network, and the lower level is called a field network or a divice network. This dissertation suggests and implements a middle level network which is called PICNET-NP (Plant Implementation and Control Network for Nuclear Power Plant). PICNET-NP is based partly on IEEE 802.4 token-passing bus access method and partly on IEEE 802.3 physical layer. For this purpose a new interface, a physical layer service translator, is introduced. A control network using this method is implemented and applied to a distributed real-time system.

  • PDF

The conceptual design of the x y $\theta$ fine stage and its optimal design to obtain fast response in lithography system.

  • Kim, Dong-Min;Kim, Ki-Hyun;Lee, Sung-Q.;Gweon, Dae-Gab
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 2001년도 ICCAS
    • /
    • pp.37.3-37
    • /
    • 2001
  • The quality of a precision product, in genera, relies on the accuracy and precision of its manufacturing and inspection process. In many cases, the level of precision in the manufacturing and inspection system is also dependent on the positioning capability of tool with respect to the workpiece in the process. Recently the positioning accuracy level employed for some of precision product has reached the level of submicron and long range of motion is required. For example, for 1GDRM lithography, 20nm accuracy and 300nm stroke needs. This paper refers to the lithography stage especially fine stage. In this study, for long stroke and high accuracy, the dual servo system is proposed. For the coarse actuator, LDM(Linear DC Noter) is used and for fine or VCM is used ...

  • PDF

전문가시스템을 활용한 BIM기반 건축공간 면적계획 최적화 방안 (Optimization of BIM based Space Plan by Expert System)

  • 권오철;조주원
    • 한국CDE학회논문집
    • /
    • 제21권2호
    • /
    • pp.99-110
    • /
    • 2016
  • The quality of building space program is a key to measure how the building performance satisfies its owner and users. However assuring its efficiency requires reliable criteria that reflect high level experience knowledge in the field. This study suggests a plan to gauge the level of building space performance using expert knowledge, which has not been utilized well enough but should play a critical role. In order to setup an expert system measuring level of the space program, we firstly optimized the space areas to the best case in a knowledgebase and use them as criteria to judge the quality of the spaces extracted from BIM model. We found the experimental results show us a promising way of measuring a relative quality of the space programs.

루프의 중첩을 이용한 저전력 상위 수준 합성 (Power-conscious high level synthesis using loop folding)

  • 김대홍;최기영
    • 전자공학회논문지C
    • /
    • 제34C권6호
    • /
    • pp.1-10
    • /
    • 1997
  • By considering low power design at higher levels of abstraction rather than at lower levels of abstraction, we can apply various transformation techniques to a system design with wider view and obtain much more effective power reduction with less cost and effort. In this paper, a transformation technique, called power - conscious loop folding is proposed for high level synthesis of a low power system.Our work is focused on reducing the power consumed by functional units in adata path dominated circuit through the decrease of switching activity. Te transformation algorithm has been implemented and integrated into HYPER, a high level synthesis system for experiments. In our experiments, we could achieve a pwoer reduction of up to 50% for data path dominated circuits.

  • PDF

동적인 다단계 제조시스템에서의 계층적 흐름 통제 방법 (Hierarchical Flow Control in a Dynamic Multi-stage Manufacturing System)

  • 노인규;김진규
    • 대한산업공학회지
    • /
    • 제21권1호
    • /
    • pp.103-118
    • /
    • 1995
  • This paper is concerned with developing flow control method for a dynamic multistage manufacturing system with interstage buffers and unreliable machines. For the effective control of proposed manufacturing system, the three-level hierarchical scheme is introduced. At the top level, we collect the system data and then, design the buffer sizes and hedging points. Short-term production rates are calculated at the middle level. At the bottom level, actual dispatching times are determined by Clear the Largest Buffer Level rule. The control method utilizes the material and the space in the buffers to alleviate the propagation of a failure to other machines in the system and keeps the production close to demand. Finally, a numerical example is provided to illustrate the mathematical control method developed and implemented in a dynamic manufacturing environment.

  • PDF