• 제목/요약/키워드: System Level Design

검색결과 4,209건 처리시간 0.036초

배송센타 분석과 설계를 위한 공학적 틀 (An Engineering Framework for Warehousing System Analysis and Design)

  • 윤창선;최경일
    • 산업공학
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    • 제8권1호
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    • pp.61-78
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    • 1995
  • Warehouse planning or design is not a static, one-time activity. To survive in the constantly changing market warehouse design should be a continuous process in which the anticipated requirment are reflected on the current warehouse status. Thus, the goal of warehouse management is to effectively utilize the various warehouse resources to meet the varying customer requirment. This paper presents an engineering framework for warehousing system analysis and design from the perspective of a total system approach. The complexity pertinent to warehousing system analysis and design is first discussed, which mainly come from the interplay among product data, order data, equipment types, operating strategies, and functional specification of the overall system. The understanding of the complexity leads to a general structure and a conceptual design procedure for a warehousing system. The general structure is comprehensive enough to represent most warehousing and flexible enough to accommodate the more sophisticated ones. The conceptual design procedure portrays the high-level interelationships the design issues.

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Supporting Adaptability and Modularity of System Software

  • Netinant, Paniti
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.1339-1342
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    • 2002
  • It is difficult to design system software to meet a better separation of concerns, which can provide a number of benefits such as adaptability, extensibility, and modularity in the design and implementation. During design, some aspectual properties, such as synchronization, scheduling, performance and fault tolerance, crosscut the basic functionalities of the system software. By separating functional components from the different aspectual components of the system software in the design, we can provide a better generic design model of system software. Aspect-Oriented Programming is a methodology that aims at separating components and aspects from the early stages of the software life cycle, and using techniques to combining them together at the implementation phase. In this paper we discuss an aspect-oriented framework that can simplify system software design and implementation by expressing it at a higher level of abstraction. Our work concentrates on how to achieve a higher separation of aspectual components, functional components, and layers from each other. Our goal is to achieve a better design model for implementing system software in terms of modularity, reusability and adaptability.

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선박 거주구 설계 일정관리 시스템 (A Scheduling and Control System for a Ship Accommodation Design Process)

  • 김정제;권오형
    • 대한조선학회논문집
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    • 제33권4호
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    • pp.124-132
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    • 1996
  • 선박 거주구 설계를 예로하여 선박설계에 있어서 업무 부하가 평준화된 최적의 설계일정계획을 도출할 수 있는 일정계획시스템을 수립하여 보았다. 설계일정관리에 영향을 주는 여러 요소들을 찾아 분석하여 최적의 설계일정을 도출할 수 있는 알고리즘을 설계하였다. 계획된 선박의 각 도면작성에 소요되는 시수를 신속하게 추정하기 위하여, 표준선박에 대한 기본 시수를 미리 설정하여 놓고 해당 선박에 대한 난이도를 적절히 적용하는 방법을 사용했다. 여러 도면작업의 진행상의 선후관계를 matrix table로 표현하여 일정표 작성의 전산화를 단순화 하였다. 이 시스템을 전산화 함으로써 계획된 선박에 대하여 그 선박의 특성이 충분히 반영 되어 작업이 평준화된 설계일정계획을 짧은 시간에 얻을 수 있었다.

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계층성을 이용한 VHDL 행위 수준에서의 설계 오류 탐색 알고리듬 (Design Error Searching Algorithm in VHDL Behavioral-level using Hierarchy)

  • 윤성욱;정현권김진주김동욱
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 추계종합학술대회 논문집
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    • pp.1013-1016
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    • 1998
  • A method for generation of design verification tests from behavior-level VHDL program is presented. Behavioral VHDL programs contain multiple communicating processes, signal assignment statements. So for large, complex system, it is difficult problem to test or simulation. In this paper, we proposed a new hardware design verification method. For this method generates control flow graph(CFG.) and process modeling graph(PMG) in the given under the testing VHDL program. And this method proved very effective that all the assumed design errors could be detected.

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하드웨어-소프트웨어 통합 설계 시스템을 위한 상위 단계에서의 검증 기법 (High-Level Design Verification Techniques for Hardware-Software Codesign Systems)

  • 이종석;김충희;신현철
    • 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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    • 제6권4호
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    • pp.448-456
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    • 2000
  • 설계되는 시스템의 규모가 커지고 복잡해지므로 이를 빠른 시간 내에 효율적으로 검증하기 위한 상위 단계에서의 검증 기술의 개발이 중요하게 되었다. 본 연구에서는 하드웨어와 소프트웨어가 혼합되어 있는 시스템을 위한 상위 단계에서의 검증기술을 개발하였다. 에뮬레이션 또는 시뮬레이션만을 수행하는 것보다 빠르고 우수하게 기능적으로 검증하기 위해, 하드웨어와 소프트웨어 부분으로 분할한 후 인터페이스 회로를 이용하여 구현 가능하도록 하였다. 그리고, 상위 단계의 회로를 쉽게 하드웨어를 이용하여 검증하기 위한 설계 지침들을 제시하였다. 본 방법을 이용하여 리드-솔로몬 디코더 회로에 대한 검증을 수행한 결과 시뮬레이션만을 수행한 경우에 비하여 modified Euclid 알고리즘 수행 블록은 12,000배 이상의 속도로 검증을 수행할 수 있었으며, 전체 검증 시간도 반 이하로 줄었다.

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Warpage Simulation by the CTE mismatch in Blanket Structured Wafer Level 3D packaging

  • Kim, Seong Keol;Jang, Chong-Min;Hwang, Jung-Min;Park, Man-Chul
    • 한국생산제조학회지
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    • 제22권1호
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    • pp.168-172
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    • 2013
  • In 3D wafer-stacking technology, one of the major issues is wafer warpage. Especially, The important reason of warpage has been known due to CTE(Coefficient of Thermal Expansion) mismatch between materials. It was too hard to choose how to make the FE model for blanket structured wafer level 3D packaging, because the thickness of each layer in wafer level 3D packaging was too small (micro meter or nano meter scale) comparing with diameter of wafer (6 or 8 inches). In this study, the FE model using the shell element was selected and simulated by the ANSYS WorkBench to investigate effects of the CTE on the warpage. To verify the FE model, it was compared by experimental results.

유비쿼터스 센서 노드를 위한 저전력 프로세서의 개발 (Design of Ultra Low Power Processor for Ubiquitous Sensor Node)

  • 신치훈;오명훈;박경;김성운
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 심포지엄 논문집 정보 및 제어부문
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    • pp.165-167
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    • 2006
  • In this paper we present a new-generation sensor network processor which is not optimized in circuit level, but in system architecture level. The new design build on a conventional processor architecture, improving the design by focusing on application oriented specification, ISA, and micro-architectural optimization that reduce overall design size and advance energy-per-instruction. The design employs harvard architecture, 8-bit data paths, and an compact 19 bit wide RISC ISA. The design also features a unique interrupt handler which offloads periodical monitoring jobs from the main part of CPU. Our most efficient design is capable of running at 300 KHz (0.3 MIPS) while consuming only about few pJ/instruction.

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3D 설계 프로세스 정립을 통한 복잡한 시스템 설계에서의 공용부품 사용 극대화 (Maximizing Use of Common Parts in Complex System Design through Organizing 3D Design Process)

  • 최영운;박강
    • 한국CDE학회논문집
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    • 제12권3호
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    • pp.209-219
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    • 2007
  • Designing a complex system such as an LCD developing system becomes inefficient when many designers are involved and create their own parts even though they can be used repeatedly in other sections. Thus, this paper proposes a new design process that can maximize the number of common parts in complex system design by organizing the 3D design process. The proposed design process consists of 5 stages: analysis of design intention, definition of initial product structure, definition of skeleton model, sharing design intention with all assembles, control of correlation between components. The proposed design process can maximize common parts in design process, which results in shorter lead time, less production cost, and greater economic benefits.

Aveva Marine과 SmartMarine 3D간의 해양 플랜트 3D 배관 CAD 모델의 배치모드 기반 비교 시스템 개발 (Development of a Batch-mode-based Comparison System for 3D Piping CAD Models of Offshore Plants)

  • 이재선;김병철;천상욱;조민철;이광;문두환
    • 한국CDE학회논문집
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    • 제21권1호
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    • pp.78-89
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    • 2016
  • When a plant owner requests plant 3D CAD models in the format that a shipbuilding company does not use, the shipyard manually re-models plant 3D CAD models according to the owner's requirement. Therefore, it is important to develop a technology to compare the re-modeled plant 3D CAD models with original ones and to quantitatively evaluate similarity between two models. In the previous study, we developed a graphic user interface (GUI)-based comparison system where a user evaluates similarity between original and re-modeled plant 3D CAD models for piping design at the level of unit. However, an offshore plant consists of thousands of units and thus a system which compares several plant 3D CAD models at unit-level without human intervention is necessary. For this, we developed a new batch model comparison system which automatically evaluates similarity of several unit-level plant 3D CAD models using an extensible markup language (XML) file storing file location and name data about a set of plant 3D CAD models. This paper suggests system configuration of a batch-mode-based comparison system and discusses its core functions. For the verification of the developed system, comparison experiments for offshore plant 3D piping CAD models using the system were performed. From the experiments, we confirmed that similarities for several plant 3D CAD models at unit-level were evaluated without human intervention.

2연 전력구의 자동화 설계 (Development of CAD System for 2Cell Box Culvert)

  • 송영철;최홍식;노병철;우상균
    • 한국전산구조공학회:학술대회논문집
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    • 한국전산구조공학회 1996년도 가을 학술발표회 논문집
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    • pp.322-329
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    • 1996
  • The objective of this study is to develop the CAD system for 2 cell box culvert by ultimate strength design method. C-language & AutoCAD Rl2 were used to create user-friendly computing environment. Consequently, users can easily design 2 cell box culvert under the various conditions, such as design load, total fill depth, underground water level, strength of concrete, and so forth. This system is believed to improve the efficiency and economy by the batch processing of structural analysis, quick drafting and computation of material quantity in the 2 cell box culvert design.

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