• Journal of Power Electronics
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• 제6권2호
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• pp.95-103
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• 2006

In this paper, a novel prototype of auxiliary switched capacitor assisted voltage source soft switching PWM Single-Ended Push Pull (SEPP) series capacitor compensated load resonant inverter with two auxiliary edge resonant lossless inductor snubbers is proposed and discussed for small scale consumer high-frequency induction heating (IH) appliances. The operation principle of this inverter is described by using switching mode equivalent circuits. The newly developed multi resonant high-frequency inverter using trench gate IGBTs can regulate its output AC power via constant frequency edge-resonant associated soft switching commutation by using an asymmetrical PWM control or duty cycle control scheme. The brand-new consumer IH products which use the newly proposed edge-resonant soft switching PWM-SEPP type series load resonant high-frequency inverters are evaluated using power regulation characteristics, actual efficiency vs. duty cycle and input power vs. actual efficiency characteristics. Their operating performance compared with some conventional soft switching high-frequency inverters for IH appliances is discussed on the basis of simulation and experimental results. The practical effectiveness of the newly proposed soft switching PWM SEPP series load resonant inverter is verified from an application point of view as being suitable for consumer high-frequency IH appliances.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.105-107
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• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• ETRI Journal
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• 제31권2호
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• pp.234-236
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• 2009

We present a novel operational amplifier preset technique for a switched-capacitor circuit to reduce the acquisition time by improving the slewing. The acquisition time of a variable gain amplifier (VGA) using the proposed technique is reduced by 30% compared with a conventional one; therefore, the power consumption of the VGA is decreased. For additional power reduction, a programmable capacitor array scheme is used in the VGA. In the 0.13 ${\mu}m$ CMOS process, the VGA, which consists of three-stages, occupies 0.33 $mm^2$ and dissipates 19.2 mW at 60 MHz with a supply voltage of 1.2 V. The gain range is 36.03 dB, which is controlled by a 10-bit control word with a gain error of ${\pm}0.68$ LSB.

• Journal of Power Electronics
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• 제7권2호
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• pp.124-131
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• 2007

In this paper, a novel type of auxiliary switched capacitor assisted edge resonant soft switching PWM resonant DC-DC converter with two simple auxiliary commutation lossless inductor snubbers is presented. The operation principle of this converter is described using the switching mode equivalent circuits. This newly developed multi resonant DC-DC converter can regulate its DC output AC power under a principle of constant frequency edge-resonant soft switching commutation by an asymmetrical PWM duty cycle control scheme. The high frequency power regulation and actual power characteristics of the proposed soft switching PWM resonant DC-DC converter are evaluated and discussed. The operating performances of the newly proposed soft switching inverter are represented based on simulation results from an applications point of view.

• Journal of Power Electronics
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• 제17권6호
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• pp.1402-1412
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• 2017

This paper presents a new high step-up dc/dc converter for renewable energy systems in which a high voltage gain is provided by using a coupled inductor. The operation of the proposed converter is based on a charging capacitor with a single power switch in its structure. A passive clamp circuit composed of capacitors and diodes is employed in the proposed converter for lowering the voltage stress on the power switch as well as increasing the voltage gain of the converter. Since the voltage stress is low in the provided topology, a switch with a small ON-state resistance can be used. As a result, the losses are decreased and the efficiency is increased. The operating principle and steady-states analyses are discussed in detail. To confirm the viability and accurate performance of the proposed high step-up dc-dc converter, several simulation and experimental results obtained through PSCAD/EMTDC software and a built prototype are provided.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.141-144
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• 2002

Several charge Injection compensation circuits, such as, the dummy transistor circuit, the switched OP-amp circuit, the switched capacitor circuit, were fabricated and the test results were compared. The differences between SPICE simulation results and measurements were within around 10%.

• 한국정보통신학회논문지
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• 제20권9호
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• pp.1763-1770
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• 2016

본 논문에서는 넓은 출력 부하 전력에서도 동작하는 하이브리드 변환기를 제안했다. 스위치드 커패시터 변환기는 높은 부하 전력에서 효율이 낮고, 낮은 부하 전력에서는 효율이 높다. 반대로, 벅 변환기는 높은 부하 전력에서는 효율이 높고, 낮은 부하 전력에서는 효율이 낮다. 제안된 하이브리드 변환기는 스위치드 커패시터 변환기와 벅 변환기를 혼합했다. 낮은 부하 전력에서는 스위치드 커패시터 변환기를 동작시키고, 높은 부하에서는 벅 변환기를 동작시켜, 넓은 출력 부하 전력에서 전력 효율을 향상시켰다. 제안된 하이브리드 변환기는 $0.18{\mu}m$ CMOS 공정으로 구현되었다. 하이브리드 변환기의 출력 부하 전력 범위는 0.05~100mW 이며, 벅 변환기와 스위치드 커패시터 변환기에서 각각 93%와 77%의 최대 전력 효율을 가진다.

• 대한전자공학회논문지
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• 제26권11호
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• pp.1666-1671
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• 1989

A novel switched-capacitor circuit for interfacing capacitive microtransducers with a digital system is developed based on the dual-slope integration. It consists of a differential integrator and a comparator. Driven by the teo phase clock, the circuit first senses the capacitance difference between the transducer and the reference capacitor in the form of charge, and accumulates it into the feedback capabitor of the integrator for a fixed period of time. The resulant accumulated charge is next extracted by the known reference charge until the integrator output voltage refurns to zero. The length of time required for the integrator output to return to zero, as measured by the number of clock cycle gated into a counter is proportional to the capacitance difference, averaged over the integration period. The whole operation is insensitive to the reference voltage and the capacitor values involved in the circuit, Thus the proposed circuit permits an accurate differental capacitance measurement. An error analysis has showh that the resolution as high as 8 bits can be expected by realizing the circuit in a monolithic MOS IC form. Besides the accuracy, it features the small device count integrable onto a small chip area. The circuit is thus particularly suitadble for the on-chip interface.

• 한국정보통신학회논문지
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• 제20권9호
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• pp.1755-1762
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• 2016

본 논문에서는 입력전압 범위가 향상된 저면적 이중출력 스위치드 커패시터 DC-DC 변환기를 제안하였다. 기존의 스위치드 커패시터는 면적이 작고 저렴하지만, 효율적인 전압변환을 하는 입력전압의 범위가 좁고 다중출력의 경우 면적이 커지고 전력효율이 낮아진다. 제안된 스위치드 커패시터 DC-DC 변환기는 입력전압에 따라 커패시터 어레이 구조를 변경하여 최적의 효율을 갖는 입력 범위를 증가시켰다. 그리고 두 개의 스위치 어레이를 공유함으로써 스위치와 커패시터 수를 32개에서 25개로 줄였다. 제안된 변환기는 $0.18{\mu}m$ CMOS 공정에서 제작하였다. 시뮬레이션 결과 입력전압 범위는 0.7~1.8V이고, 최대 전력 효율은 90%이며, 칩의 면적은 $0.255mm^2$이다.

• 전자공학회논문지C
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• 제36C권1호
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• pp.49-58
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• 1999

본 논문에서는 통과 대역폭이 5KHZ, ripple이 0.1dB이하인 스위치드 캐패시터(Switched Capacitor) 필터를 $0.8{\mu}m$ single poly CMOS ASIC 표준 공정을 이용하여 집적화된 단일 칩으로 제작하였다. 제안된 5차 타원 저역 통과 필털의 구성은 MOS 스위치와 poly 캐패시터, 5개의 2단 CMOS op-amp로 구성하였다. 필터구현은 LC 수동형으로부터 연속전달함수 H(s)를 구하고 쌍선형 z변환을 통하여 이산전달함수 H(z)으로 바꾸어 2차 바이쿼드(biquad)를 종속 연결하는 빌딩블록 방식을 택하였다. 또한 op-amp의 구동범위를 고려하면서 캐패시터 면적을 감소시킨 스케일링 실시한 동일 특성의 필터를 제작하여 그 특성 변화를 비교, 분석하였다. 측정결과 ${\pm}2.5V$ 전원, 50KHz의 표본 주파수에서 2종의 필터 모두 4.96~4.98KHz의 통과 대역폭에 0.7~0.81dB의 리플, 35~38dB정도의 저지대역 이득감쇠 특성을 보였다.