• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.3
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• pp.312-320
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• 2019

In this paper, we design a 512Kb eFlash IP using 110nm eFlash cells. We proposed eFlash core circuit such as row driver circuit (CG/SL driver circuit), write BL driver circuit (write BL switch circuit and PBL switch select circuit), read BL switch circuit, and read BL S/A circuit which satisfy eFlash cell program, erase and read operation. In addition, instead of using a cross-coupled NMOS transistor as a conventional unit charge pump circuit, we propose a circuit boosting the gate of the 12V NMOS precharging transistor whose body is GND, so that the precharging node of the VPP unit charge pump is normally precharged to the voltage of VIN and thus the pumping current is increased in the VPP (boosted voltage) voltage generator circuit supplying the VPP voltage of 9.5V in the program mode and that of 11.5V in the erase mode. A 12V native NMOS pumping capacitor with a bigger pumping current and a smaller layout area than a PMOS pumping capacitor was used as the pumping capacitor. On the other hand, the layout area of the 512Kb eFlash memory IP designed based on the 110nm eFlash process is $933.22{\mu}m{\times}925{\mu}m(=0.8632mm^2)$.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.1025-1028
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• 1992

In this paper the flyback converter analysis is presented using the model of the PWM switch, which is easier to use than the general method of state-space averaged model. A procedure to design the flyback convertor and the feedback circuit is illustrated. From these results, a stable flyback convertor regulation system is possible by using the PWM switch model.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.265-268
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• 1998

This paper presents a soft-switching average current control PWM high power factor boost converter. Conventional boost ZVT-PWM converter has a disadvantage of hard-switching for auxiliary switch at turn-off. A soft switched auxiliary switch is proposed to achieve a high performance ZVT-PWM boost rectifier. The simulation and experimental results show that soft switching operation can be maintained for wide line and load range, which in turn improves the converter performance in terms of efficiency, switching noise and circuit reliability.

• Proceedings of the KSR Conference
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• 2002.10b
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• pp.995-1000
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• 2002

This paper presents general concept of DC switch gear(DCSWGR). Normally, DCSWGR consist of Digital protection unit(DPU), High Speed Circuit Breaker(HSCB), Disconnect Switch (DS), Programmable Logic Control(PLC), Auxiliary Relays and etc. Most of the components has its special characteristics and their interface between each others are various and complex. In this paper every constituent general design are preceded and interface between each component are examined. And also DCSWGR operation logic with logical diagram including interlock signal are introduced.

• Journal of Power Electronics
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• v.9 no.6
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• pp.949-959
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• 2009

This paper presents a systematic investigation of the fault-mode behaviors of matrix converter systems. Knowledge about converter behaviors after fault occurrence is important from the standpoint of reliable system design, protection and fault-tolerant control. Converter behaviors have been, in detail, examined with both qualitative and quantitative approaches for key fault types, such as switch open-circuited faults and switch short-circuited faults. Investigating the fault-mode behaviors of matrix converters reveals that converter operation with switch short-circuited faults leads to overvoltage stresses as well as overcurrent stresses on other healthy switching components. On the other hand, switch open-circuited faults only result in overvoltage to other switching components. This study can be used to predict fault-mode converter behaviors and determine additional stresses on remaining power circuit components under fault-mode operations.

• Journal of Power Electronics
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• v.15 no.2
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• pp.497-503
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• 2015

This paper analyses the harmonic pollution to power grids caused by several high-power rectifiers, summarizes the requirements for rectifiers in suppressing grid-side current harmonics and optimizes a new-type of current source PWM rectifier with a hybrid switch. The rectifier with a hybrid switch boasts significant current characteristics and cost advantages in the high-power area. To further enhance the working frequency of the current source rectifier with a hybrid switch for suppressing grid-side harmonics and reducing the inductance size, this paper proposes an optimal control strategy based on space vector. It also verifies that the optimal control strategy based on space vector can reduce the total harmonic distortion of the grid-side current of the rectifier with a hybrid switch via circuit simulation and experimental results.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.11
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• pp.167-174
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• 1996

For the decreasing of switching loss, this paper designs the improved buck converter circuit and then compare with the conventional buck converter and finally analyzes the performance. When the switch is turn-off, in the buck converter using the smoothing capacitor, the flow of transient current and peak voltage having the high frequency components was generated because of the instantaneous open-state in the teminals of the switch. However, the buck converter presented in this paper eliminated this disadvantage by using the L-C circuit. Therefore, the higher PF in 0.85 is achieved than that of the buck converter using the smoothing capacitor. Also, due to the decreasing of the harmonic contain rate, the current usage rate is to be higher than that of the conventional buck converter by 4.48dB and the output voltage varient rate for the step response is to be lower 1.32 times than that of the conventional buck converter.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.545-548
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• 2004

The paper describes the design of high-speed, high-resolution Sample-and-Hold circuit which shows the conversion rate 80MHz and the power supply of 3.3v with 0.35um CMOS 2-poly 4-metal process for high-speed, high resolution Analog-to-Digital Converter. For improving Dynamic performance of Sample-and-Hold, Two Double bootstrap switch and high performance operational amplifier with gain booster, which are used. and For physical stability of Sample and Hold circuit, reduces excess voltage of gate in bootstrap switch. Simulation results using HSPICE shows the SFDR of 71dB, 75dB in conversion rate of 80MHz result for two inputs(0.5Vpp, 10MHz and 1Vpp, 10MHz) and the power dissipation of 48mW at single 3.3V supply voltage.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.412-414
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• 1994

A new active resonant snubber (ARS) circuit providing the ideal switching conditions for PWM converter is presented. By using the proposed ARS circuit to PWM converters, the power switches can be operated to give zero-current and zero-voltage at both the instant of switch off and switch on, without increasing voltage/current stresses of the switches. Furthermore, the PWM converters employed ARS circuit has the advantage that it can operate at constant frequency, giving better definded EMI and filter ripple, and it is also suited for high-power application regardless of the semiconductor devices (such as MOSFETs or IGBTs) used as a power switches.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1416_1417
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• 2009

This paper shows the characteristic of wave tail according to inductance values in 10/$350{\mu}s$ impulse circuit with crowbar switch. The PSpice was used to simulate the 10/$350{\mu}s$ current waveform and lightning current impulse generator was used to generate real current waveform. As a capacitor of condenser bank increases, a virtual front time increases and a time to half-value decreases. To get a perfect 10/$350{\mu}s$ current waveform, we should consider the combination of circuit values of the inductance, capacitance, time difference between trigger pulses and charged voltage of capacitor bank.