• Title/Summary/Keyword: Subsynchronous Oscillation

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Design of HVDC System 550 Damping Controller Using Novel Eigenvalue Analysis Program (신고유치 해석 프로그램을 이용한 직류계통 축비틀림 진동 댐핑 제어기 설계)

  • 김동준;남해곤;문영환;김용구
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.53 no.3
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    • pp.140-151
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    • 2004
  • This paper presents the HVDC system modelling for analysis of subsynchronous oscillation and the design of the subsynchronous oscillation damping controller in HVDC system with the aid of novel eigenvalue analysis program. The HVDC system models include both the steady-state model for power flow calculation and the dynamic model for constructing the state matrix. The design procedures of the subsynchronous oscillation damping controller (SODC), which is integrated with PI controller at rectifier, consist of three steps:1) to identify the dominant torsional oscillation mode in the AC/DC system;2) to determine the parameters of the SODC for compensating the phase lagging due to the rectifier controller;3) to validate the control parameters and to determine the appropriate gain using a time-domain simulation program. The proposed design method has been tested against two AC/DC systems for validation.

A New Approach to HVDC System Control for Damping SSO Using the Novel Eigenvalue Analysis Program

  • Kim, Dong-Joon;Nam, Hae-Kon;Moon, Young-Hwan
    • KIEE International Transactions on Power Engineering
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    • v.4A no.4
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    • pp.178-191
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    • 2004
  • This paper presents a new approach to HVDC system control for damping subsynchronous oscillation (SSO) involving HVDC converters and turbine generator shaft systems. This requires a novel eigenvalue analysis (NEA) program, derivation of HVDC system modeling considering steady-state conditions and dynamic conditions in the combined AC/DC system, and an appropriate control scheme. The method suggested makes possible the design of a subsynchronous oscillation damping controller (SODC) to provide positive damping torque for the range of torsional modes in combined AC/DC systems. There are three steps involved in the design of a SODC; first the worst torsional mode is determined using the NEA program, next the SODC parameters are designed for the range of that torsional mode, and then finally an off-line simultaneous time domain program such as PSCAD/EMTDC is used to verify the parameters of the SODC. The suggested SODC design method is applied to two AC/DC systems, and its practicality is verified using the PSCAD/EMTDC simulation program.

Design of a Robust STATCOM Supplementary Controller to Suppress the SSR in the Series-compensated System (직렬 보상 선로에서의 SSR 억제를 위한 강인한 STATCOM 보조 제어기의 설계)

  • Seo, Jang-Cheol;Mun, Seung-Il;Park, Jong-Geun
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.49 no.3
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    • pp.136-141
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    • 2000
  • This paper presents the design of an H$\infty$ based robust Static Synchronous Compensator (STATCOM) supplementary controller to suppress the subsynchronous resonance (SSR) in the series-compensated system. The IEEE second benchmark, System-l model is employed for this study. In order to design the effective controller, the modal controllability and observability indices to the oscillation modes are considered. Comprehensive time domain simulations using a nonlinear system model that the proposed STATCOM supplementary controller can suppress the SSR efficiently in spite of the variations of power system operating conditions.

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MLE Based Power System Oscillation Detector by Using Measurement Data (최대 리아프노프 지수를 활용한 전력계통 측정 데이터 기반 비선형 동요 현상 검출 방안)

  • Cho, Hwanhee;Lee, Byongjun;Nam, Suchul;Kim, Yonghak
    • KEPCO Journal on Electric Power and Energy
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    • v.4 no.2
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    • pp.55-61
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    • 2018
  • 본 연구는 시각 동기 위상 측정 정보를 이용하여 전력계통에 나타나는 여러 가지 동요 현상을 검출하기 위한 기초 연구로써, 시계열 데이터 분석 분야로 분류된다. 제시한 방법은 비선형 동특성에 해석 기반으로 접근하여 전력계통에 나타날 수 있는 여러 동요 현상을 범용적으로 검출해 낼 수 있다. 비선형 동요 현상의 신호적 패턴을 수학적으로 기본 순시치 파형으로부터 피크치 샘플링을 통해 전개하여 계통 요소간 간섭으로 인한 원하지 않는 진동 모드를 검출하고자 한다. 계통의 변화로 진동 모드가 나타날 때, 2차원 평면에 실효치로 환산한 시계열 전압 데이터와 선형화된 플로퀘트 상수(Floquet multiplier)를 맵핑하여 도시하고, 정상상태 지점으로부터 거리를 계산하여 최대 리아프노프 지수 계산을 통해 계통이 불안정하게 되는 시간을 시계열 데이터 분석으로 추정하는 것이 본 방법의 핵심이다. 이러한 접근으로 제시한 비선형 동요 검출 알고리즘을 적용하여 디지털 필터 적용 또는 주파수 영역 해석과 같은 오프라인 Study와 달리 온라인으로 신속하게 계통의 현재 상태를 알 수 있게 된다.