• 제목/요약/키워드: Sub-structure

검색결과 4,922건 처리시간 0.032초

Ge2Sb2Te5/TiN/W-Doped Ge2Sb2Te5 셀 구조의 다중준위 메모리 특성 평가 (Evaluation of Multi-Level Memory Characteristics in Ge2Sb2Te5/TiN/W-Doped Ge2Sb2Te5 Cell Structure)

  • 조준혁;서준영;이주희;박주영;이현용
    • 한국전기전자재료학회논문지
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    • 제37권1호
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    • pp.88-93
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    • 2024
  • To evaluate the possibility as a multi-level memory medium for the Ge2Sb2Te5/TiN/W-doped Ge2Sb2Te5 cell structure, the crystallization rate and stabilization characteristics according to voltage (V)- and current (I)- pulse sweeping were investigated. In the cell structures prepared by a magnetron sputtering system on a p-type Si (100) substrate, the Ge2Sb2Te5 and W-doped Ge2Sb2Te5 thin films were separated by a barrier metal, TiN, and the individual thicknesses were varied, but the total thickness was fixed at 200 nm. All cell structures exhibited relatively stable multi-level states of high-middle-low resistance (HR-MR-LR), which guarantee the reliability of the multilevel phase-change random access memory (PRAM). The amorphousto-multilevel crystallization rate was evaluated from a graph of resistance (R) vs. pulse duration (T) obtained by the nanoscaled pulse sweeping at a fixed applied voltage (12 V). For all structures, the phase-change rates of HR→MR and MR→LR were estimated to be approximately t<20 ns and t<40 ns, respectively, and the states were relatively stable. We believe that the doublestack structure of an appropriate Ge-Sb-Te film separated by barrier metal (TiN) can be optimized for high-speed and stable multilevel PRAM.

SiO2/P+ 컬렉터 구조를 가지는 1700 V급 고전압용 IGBT의 설계 및 해석에 관한 연구 (Design and Analysis of Insulator Gate Bipolor Transistor (IGBT) with SiO2/P+ Collector Structure Applicable to 1700 V High Voltage)

  • 이한신;김요한;강이구;성만영
    • 한국전기전자재료학회논문지
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    • 제19권10호
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    • pp.907-911
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    • 2006
  • In this paper, we propose a new structure that improves the on-state voltage drop and switching speed in Insulated Gate Bipolar Transistors(IGBTs), which can be widely used in high voltage semiconductors. The proposed structure is unique in that the collector area is divided by $SiO_2$, whereas the conventional IGBT has a planar P+ collector structure. The process and device simulation results show remarkably improved on-state and switching characteristics. Also, the current and electric field distribution indicate that the segmented collector structure has increased electric field near the $SiO_2$ corner, which leads to an increase of electron current. This results in a decrease of on-state resistance and voltage drop to $30%{\sim}40%$. Also, since the area of the P+ region is decreased compared to existing structures, the hole injection decreases and leads to an increase of switching speed to 30 %. In spite of some complexity in process procedures, this structure can be manufactured with remarkably improved characteristics.

원자층증착법으로 증착된 강유전성 플루오라이트 구조 강유전체 박막의 불순물 효과 (A brief review on the effect of impurities on the atomic layer deposited fluorite-structure ferroelectrics)

  • 이동현;양건;박주용;박민혁
    • 한국표면공학회지
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    • 제53권4호
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    • pp.169-181
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    • 2020
  • The ferroelectricity in emerging fluorite-structure oxides such as HfO2 and ZrO2 has attracted increasing interest since 2011. Different from conventional ferroelectrics, the fluorite-structure ferroelectrics could be reliably scaled down below 10 nm thickness with established atomic layer deposition technique. However, defects such as carbon, hydrogen, and nitrogen atoms in fluorite-structure ferroelectrics are reported to strongly affect the nanoscale polymorphism and resulting ferroelectricity. The characteristic nanoscale polymorphism and resulting ferroelectricity in fluorite-structure oxides have been reported to be influenced by defect concentration. Moreover, the conduction of charge carriers through fluorite-structure ferroelectrics is affected by impurities. In this review, the origin and effects of various kinds of defects are reviewed based on existing literature.