• Title/Summary/Keyword: Step input control

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Dynamic Modeling and Pressure Control of Piezoactuator Based Valve Modulator Integrated with Flexible Flapper (유연 플래퍼와 연계한 압전 밸브 모듈레이터의 동적 모델링 및 압력 제어)

  • Jeon, Jun-Cheol;Maeng, Young-Jun;Sohn, Jung Woo;Choi, Seung-Bok;Lee, Soo-Jin
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.20 no.10
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    • pp.976-982
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    • 2010
  • This paper proposes a novel type of pressure control mechanism which can apply to vehicle ABS (anti-lock braking system) utilizing the piezoactuator based valve system associated with the pressure modulator. As a first step, a flapper-nozzle of a pneumatic valve system is devised by integrating the piezoacuator to the flexible beam structure. The dynamic modeling of the valve system is then undertaken and subsequently the governing equation of pressure control is derived considering the pressure modulator. A sliding mode controller is designed in order to achieve accurate pressure tracking control in the presence of actuator uncertainty as well as input pressure variation. It is shown through computer simulation that an accurate pressure tracking for sinusoidal motion whose magnitude is 40 bar is achieved by utilizing the proposed pressure control mechanism.

High Performance Speed Control of Switched Reluctance Motor

  • Song, Byeang-Seab;Yoon, Yong-Ho;Choi, Jun-Hyuk;Kim, Jun-Ho;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.457-461
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    • 2001
  • Advantages of switched reluctance motor(SRM) drives make it an attractive candidate for replacing adjustable speed ac and dc drives in both industrial and consumer applications. Furthermore, a simple, low cost and robust SRM drive can be efficiently operated in the hostile environment of an automobile. Generally, the speed control of SRM has a large step change or large torque reference, the output of its PI controller is often saturated. When this happens, the integral state is not consistent with the SRM input, while may give rise to the windup phenomenon. This paper proposes anti-windup control method for SRM speed control system by hysteresis current controlled asymmetry bridge converter. The experimental results show that the speed response has much improved performance, such as a small overshoot and fast settling time at the acceleration and particulary deceleration period with braking mode.

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A study on the force control of MR cylinder with built-in valves (밸브 내장형 MR 실린더를 이용한 힘 제어에 관한 연구)

  • Song J.Y.;Ahn K.K.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.1018-1023
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    • 2005
  • A new MR cylinder with built-in valves using MR fluid (MR valve) is suggested and fabricated for fluid control systems. The MR fluid is a newly developed functional fluid whose obvious viscosity is controlled by the applied magnetic field intensity. The MR cylinder is composed of cylinder with small clearance and piston with electromagnet. The differential pressure is controlled by the applied magnetic field intensity. It has the characteristics of simple, compact and reliable structure. The size of MR cylinder and piston has ${\varphi}30mm{\times}300mm\;and\;{\varphi}28.5mm{\times}120mm$ in face size, respectively and 0.8mm in gap length. Through experiments, it was found that the differential pressure is controlled by the applied magnetic field intensity under little influence of the flow rate, which corresponds to a pressure control valve. The differential pressure of 0.47MPa and contact force of 320N were obtained with the input current of 1.5A. The rising time of force was 1.1s in step response of a manipulator using the MR cylinder. The effectiveness of the MR cylinder was also demonstrated through the force control.

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A Plight Test Method for the System Identification of an Unmanned Aerial Vehicle (무인항공기의 시스템 식별을 위한 비행시험기법)

  • Lee, Youn-Saeng;Suk, Jin-Young;Kim, Tae-Sik
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.30 no.7
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    • pp.130-136
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    • 2002
  • In this paper, a flight test method is described for the system identification of the unmanned aerial vehicle equipped with an automatic flight control system. Multistep inputs are applied for both longitudinal mode and lateral/directional excitation. Optimal time step for excitation is sought to provide the broad input bandwidth. A programmed mode flight test method provides high-quality flight data for system identification using the flight control computer with the longitudinal and lateral/directional autopilot which enables the separation of each motion during the flight test. In addition, exact actuating input that is almost equivalent to the designed one guarantees the highest input frequency attainable. Several repetitive flight tests were implemented in the calm air in order to extract the consistent system model for the air vehicle. The enhanced airborne data acquisition system endowed the high-quality flight data for the system identification. The flight data were effectively used to the system identification of the unmanned aerial vehicle.

Design of a step-up DC-DC Converter using a 0.18 um CMOS Process (0.18 um CMOS 공정을 이용한 승압형 DC-DC 컨버터 설계)

  • Lee, Ja-kyeong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.6
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    • pp.715-720
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    • 2016
  • This paper proposes a PWM (Pulse Width Modulation) voltage mode DC-DC step-up converter for portable devices. The converter, which is operated with a 1 MHz switching frequency, is capable of reducing the mounting area of passive devices, such as inductor and capacitor, and is suitable for compact mobile products. This step-up converter consists of a power stage and a control block. The circuit elements of the power stage are an inductor, output capacitor, MOS transistors Meanwhile, control block consist of OPAMP (operational amplifier), BGR (band gap reference), soft-start, hysteresis comparator, and non-overlap driver and some protection circuits (OVP, TSD, UVLO). The hysteresis comparator and non-overlapping drivers reduce the output ripple and the effects of noise to improve safety. The proposed step-up converter was designed and verified in Magnachip/Hynix 0.18um 1-poly, 6-metal CMOS process technology. The output voltage was 5 V with a 3.3 V input voltage, output current of 100 mA, output ripple less than 1% of the output voltage, and a switching frequency of 1 MHz. These designed DC-DC step-up converters could be applied to the Personal Digital Assistants(PDA), cellular Phones, Laptop Computer, etc.

A 12 bit 750 kS/s 0.13 mW Dual-sampling SAR ADC

  • Abbasizadeh, Hamed;Lee, Dong-Soo;Yoo, Sang-Sun;Kim, Joon-Tae;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.6
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    • pp.760-770
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    • 2016
  • A 12-bit 750 kS/s Dual-Sampling Successive Approximation Register Analog-to-Digital Converter (SAR ADC) technique with reduced Capacitive DAC (CDAC) is presented in this paper. By adopting the Adaptive Power Control (APC) technique for the two-stage latched type comparator and using bootstrap switch, power consumption can be reduced and overall system efficiency can be optimized. Bootstrapped switches also are used to enhance the sampling linearity at a high input frequency. The proposed SAR ADC reduces the average switching energy compared with conventional SAR ADC by adopting reduced the Most Significant Bit (MSB) cycling step with Dual-Sampling of the analog signal. This technique holds the signal at both comparator input asymmetrically in sample mode. Therefore, the MSB can be calculated without consuming any switching energy. The prototype SAR ADC was implemented in $0.18-{\mu}m$ CMOS technology and occupies $0.728mm^2$. The measurement results show the proposed ADC achieves an Effective Number-of-Bits (ENOB) of 10.73 at a sampling frequency of 750 kS/s and clock frequency of 25 MHz. It consumes only 0.13 mW from a 5.0-V supply and achieves the INL and DNL of +2.78/-2.45 LSB and +0.36/-0.73 LSB respectively, SINAD of 66.35 dB, and a Figures-of-Merit (FoM) of a 102 fJ/conversion-step.

The Size Correction Method of Eyes Region using Morphing (모핑을 이용한 눈 영역 크기 보정 기법)

  • Goo, Eun-jin;Cha, Eui-young
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.83-86
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    • 2013
  • In this paper, by using the Morphing, if the size of the eyes of both sides are not the same, we propose a method to correct the size of eyes area. First, by using the Haar-like feature from a input image that is input, to detect the shape of the eyes and face. After inverting the left and right eye region of one of the shape of the eyes detected sets the correspondence between the second with a line to control the shape of the eyes detected using eyes that is detected with canny edge, in the previous step. To the Warping to match the correspondence was then set in the previous step, an area of each eye. Then, I merge the image which merged in the eye area is detected from the original image. As a result, a system result of the experiment in the test image and face image seen from the front, the proposed, prove to be more efficient than a method of keying the size of the eye only.

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Implementation of Zero-Ripple Line Current Induction Cooker using Class-D Current-Source Resonant Inverter with Parallel-Load Network Parameters under Large-Signal Excitation

  • Ekkaravarodome, Chainarin;Thounthong, Phatiphat;Jirasereeamornkul, Kamon
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1251-1264
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    • 2018
  • The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

Development of Multiplier Operator for Input Signal Control of Electronic Circuits (전자회로의 입력신호 제어용 곱셈연산기 개발)

  • Kim, Jong-Ho;Chang, Hong-Ki;Kwon, Dae-Shik;Che, Gyu-Shik
    • Journal of Advanced Navigation Technology
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    • v.22 no.2
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    • pp.154-162
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    • 2018
  • The multiplier circuit is necessary to estimate degradation status of electronic cards in nuclear power plant, but its accuracy is not easy in processing those functions to multiply two input signals. What is important in multiplier circuit is that the multiplication result must be accurate and its linearity must be perfect. We developed and proposed excellent linearity multiplier circuit using operational amplifiers and transistor characteristics, and then proved its validity in this paper. We have made efforts to eliminate nonlinearity components of semiconductors with this circuit in order to ensure excellent linearity of developed multiplier circuit. We conducted multiplication operations through simulation, applying adequate values to each component in order to verify the circuit composed of that method. We showed step-by-step output signals, and then compared the logical analyses and measuring results as simulation results. We confirmed that this method is superior to existing multiplication or linearity.

Development of an Embedded Solar Tracker using LabVIEW (LabVIEW 적용 임베디드 태양추적장치 개발)

  • Oh, Seung-Jin;Lee, Yoon-Joon;Kim, Nam-Jin;Oh, Won-Jong;Chun, Won-Gee
    • Journal of Energy Engineering
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    • v.19 no.2
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    • pp.128-135
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    • 2010
  • This paper introduces step by step procedures for the fabrication and operation of an embedded solar tracker. The system presented consists of application software, compactRIO, C-series interface module, analogue input module, step drive, step motor, feedback devices and other accessories to support its functional stability. CompactRIO that has a real-tim processor allows the solar tracker to be a stand-alone real time system which operates automatically without any external control. An astronomical method and an optical method were used for a high-precision solar tracker. CdS sensors are used to constantly generate feedback signals to the controller, which allow a solar tracker to track the sun even under adverse conditions. The database of solar position and sunrise and sunset time was compared with those of those of the Astronomical Applications Department of the U.S. Naval Observatory. The results presented here clearly demonstrate the high-accuracy of the present system in solar tracking, which are applicable to many existing solar systems.