• 조명전기설비학회논문지
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• 제22권11호
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• pp.1-8
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• 2008

In this paper, the optical properties of the 54[W] LED module have confirmed by changing the angles of LED modules for street light applications. The angle of LED module changed from the $0[^{\circ}]$ to $60[^{\circ}]$ varying by $20[^{\circ}]$ as horizontal direction ${\ominus}_1$. Morever, the angle of LED module changed from the $0[^{\circ}]$ to $15[^{\circ}]$ varying by $5[^{\circ}]$ as vertical direction ${\ominus}_2$. As a result of simulation, the average illumination was about 17[lux] and the overall illuminance uniformity was 0.29 for a 10.39[m] long and 6[m] wide illuminance area at height of 6[m], which is acceptable for street lighting illumination in the Illuminating Engineering Society(IES) standard.

• IEIE Transactions on Smart Processing and Computing
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• 제6권2호
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• pp.133-139
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• 2017

Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.413-416
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• 1998

Sensitivity and calibration considerations are most important in the design and implementation of real control systems. Ideally parameter changes due to various causes should not appreciably affect the system's performances. But all the values of physical components of the plants and controllers as well as the relevant environmental conditions change in time, thus the output performance can be deteriorated during the operating span of the system. Naturally the duty of calibration or the prevention of performance deterioration due to excessive component sensitivity should be provided to the control system. In this paper, we propose a digital controller which has the capability of calibration and gain adjustment as well as the execution of control law. Specifically the problems of gain adjustment and offset calibration in the light source and CdS sensor module for position measurement in a flexible link system are considerably resolved. The parameters of measurement module are prone to change due to environmental brightness conditions resulting in poor steady state performance of the overall control system. Thus a proper method is necessary to provide correction to the changed values of gain and offset in the position measurement module. The proposed controller, whenever necessary, measures the open-loop characteristics, andthen calculates the offset and sensor gain correction values based on the prepared standard measurements. It is applied to the control of a flexible link system with the gain and offset calibration porblems in the light sensor module for position to show the applicability.

• 신재생에너지
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• 제16권1호
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• pp.41-46
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• 2020

The share of agrophotovoltaics in the "renewable energy 3020", which is the Korean government policy for revitalizing new and renewable energy, is increasing gradually. In this study, the distribution of solar radiation received by crops growing on virtual farmland under a range of conditions, such as module height, module angle, shading ratio, and module type, was quantified and analyzed using an Ecotect program, which allows insolation analysis during the period from spring to fall. As the module angle increases, transmissive modules increase the amount of solar radiation delivered to the lower farmland. In addition, the difference between 3x12 Cell Type and 4x9 Cells Type, which are types of photovoltaic modules used in practice, was found to be small. The analysis results can be used as a design standard for the future establishment of agrophotovoltaic systems.

• 한국강구조학회 논문집
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• 제22권1호
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• pp.99-108
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• 2010

본 연구는 구조상세설계와 모델링 단계에서 활용 가능한 철골 접합부 모델링 자동화 모듈의 개발을 목적으로 한다. 이를 위해 접합부의 구조해석 결과를 3D 모델링의 입력 변수와 표준접합상세지침을 고려하여 라이브러리 D/B로 구축하였다. 구축된 라이브러리 D/B를 접합부 3D 모델링 단계에서 활용하기 위하여 상용 S/W에서 제공하는 OpenAPI 함수를 이용하여 접합부 자동 생성 모듈을 개발하였다. 개발된 모듈을 검증하기 위해 6층 규모의 철골 오피스 구조물을 대상으로 접합부 모델링을 수행하였으며, 접합부 모델링 과정에 대해 기존 프로세스와 연구 프로세스의 비교를 통해 적용성과 효율성을 검증하였다.

• 한국정보기술응용학회:학술대회논문집
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• 한국정보기술응용학회 2005년도 6th 2005 International Conference on Computers, Communications and System
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• pp.285-288
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• 2005

We propose a novel programmable miniature vision module based on a custom designed analog VLSI (aVLSI) chip. The vision module consists of the optical flow vision sensor embedded with commercial off-the-shelves digital hardware; in our case is the Intel XScale PXA270 processor enforced with a programmable gate array device. The aVLSI sensor provides gray-scale imager data as well as smooth optical flow estimates, thus each pixel gives a triplet of information that can be continuously read out as three independent images. The particular computational architecture of the custom designed sensor, which is fully parallel and also analog, allows for efficient real-time estimations of the smooth optical flow. The Intel XScale PXA270 controls the sensor read-out and furthermore allows, together with the programmable gate array, for additional higher level processing of the intensity image and optical flow data. It also provides the necessary standard interface such that the module can be easily programmed and integrated into different vision systems, or even form a complete stand-alone vision system itself. The low power consumption, small size and flexible interface of the proposed vision module suggests that it could be particularly well suited as a vision system in an autonomous robotics platform and especially well suited for educational projects in the robotic sciences.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 1994년도 춘계공동학술대회논문집; 창원대학교; 08월 09일 Apr. 1994
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• pp.653-659
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• 1994

Human experts have the various own knowledges to be applied in specialized domains. The fact that knowledge itself becomes more critical in the context of textile knowledge with rapid development of new fibers, automated equipments, processes and applications. Diversity of worsted spun yarns, lack of human expertise, and inconsistency among manually generated process plans in consequency of adjustment machine parameters owing to change up raw materials frequently increase the necessity of developing computer aided process planning(CAPP) systems for spinning process. Expert systems offer one of techniques to develop CAPP systems which would behave in a knowledgeable manner. Expert systems are the problem-solving computer program that can reach a level of performance comparable to that of a human expert in some specialized problem domain. This paper is described as job justification module. The job justification module performs to consult with users on which worsted spun yarn manufacturing process planning under the various factors, e.g., raw materials, machine parameters and required yarn counts. Also, the developed module informs the various knowledges relevant process planning. The job justification module offers the control parameters at each process and includes the various standard process plans as database. These knowledges are generated by facts and rules within rule bases.

• 한국항공우주학회지
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• 제38권2호
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• pp.188-194
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• 2010

본 연구에서는 영상레이다 (SAR)의 영상품질 분석 변수 및 확장 보간법, 배경레벨 제거 기법 등의 분석 기법을 정의하고 이를 바탕으로 SAR 영상품질 분석 툴을 개발하였다. 개발된 SAR 영상품질 분석 툴은 크게 점 표적 분석 (PTA) 모듈, 분산 표적 분석 (DTA) 모듈, 모호성 분석 (AMA) 모듈, NESZ 분석 (NESZA) 모듈, 총 4개의 주요 모듈로 구성된다. 개발 툴은 SAR 제품 파일 포맷에서 다양한 시스템 파라미터 추출하고, 이를 바탕으로 임펄스 응답 특성, 방사 성능, 모호성 등의 SAR 영상 품질 변수를 계산한다.

• 한국해양공학회지
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• 제27권1호
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• pp.9-15
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• 2013

This paper calculates the mating dynamic forces of a semi-submersible offshore structure's topside module, where a hull moored in the sea is combined with a topside module carried by a heavy lift vessel, as a mating installation method. The environmental conditions include various wave directions and wave heights, with constant wind and current speeds. Appropriate ballast and de-ballast plans for the heavy lift vessel and hull of the semi-rig should be performed in order to safely obtain these forces, whereas a fixed platform or the GBS (Gravity based structure) type of offshore structure only needs a ballast plan for the heavy lift vessel. From this paper, the allowable wave height or wave direction for the mating procedure can be investigated based on the standard DAF (Dynamic amplitude factor) of the rules and regulations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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• pp.214-217
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• 2003

In this paper, we deal with implementing design for a correlator access code generator module which they are used for setting up a connection between units, a packet decision, a clock syncronization, by FPGA. The orrelator module which is composed of the Wallace Tree's CSA and threshold value decision device decides useful a packet and syncronizes a clock, after it correlates an input signal of 1 Mbps transmission rate by a sliding window. An access code generator module which is composed of a BCH (Bose-Chadhuri-Hocquenghem) cyclic encoder and control device was designed according as a four steps' generation process proposed in the bluetooth standard. The pseudo random sequence which solves syncronization problem saved a voluntary device Proposed the module was designed by VHDL. An simulation and test are inspected by Xilinx FPGA.