• 대한전자공학회논문지SD
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• 제45권1호
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• pp.28-36
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• 2008

이번 논문은 implantable cardiac 페이스메이커의 검출 단 로서 저전압, 저전력 단일-비트 삼차 델타-시그마 모듈레이터를 구현하였다. 1V이하의 전원 전압에서 효과적으로 동작하기 위하여 distributed feedforward구조와 벌크-드리븐 OTA를 활용하였다. 설계된 모듈레이터는 0.8V의 전원 전압에서 49dB의 dynamic range를 가지면서 816nW의 파워를 소모하였다. 파워 소모를 획기적으로 줄임으로서 페이스메이커뿐만 아니라 제한된 배터리에서 동작하는 implantable 의료 기기에서 다양한 활용이 가능할 것으로 생각된다. 본 모듈레이터의 칩 크기는 $1000{\mu}m{\times}500{\mu}m$로서 $0.18{\mu}m$ CMOS standard 공정으로 제작되었다.

• 전력전자학회논문지
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• 제18권4호
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• pp.397-402
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• 2013

This paper proposes a new passive type LED driver which satisfies the standard of power factor (PF) and total harmonic distortion (THD). The proposed passive LED driver also has high-efficiency and long-life time characteristics compared to active LED driver which is composed of op-amp, switches and so on. By using just passive components such as inductor, capacitor, and diode, it has resolved extremely short-life time and low-efficiency problems of previous LED drivers. It has achieved PF of 0.99, THD of 16.4 %, and the total efficiency of 95 %. The proposed passive LED driver is fully analyzed and verified by simulations and experiments, which results are in good agreement each other.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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• pp.69-69
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• 2003

최근 trench capacitor, isolation trench, micro-electromechanical system(MEMS), micro-opto-electromechanical system(MOEMS)등의 다양한 기술에 적용될 고종횡비(HAR) 실리콘 식각기술연구가 진행되어 지고 있다. 이는 기존의 습식식각시 발생하는 결정방향에 따른 식각률의 차이에 관한 문제와 standard reactive ion etching(RIE) 에서의 낮은 종횡비와 식각률에 기인한 문제점들을 개선하기 위해 고밀도 플라즈마를 이용한 건식식각 장비를 사용하여 고종횡비(depth/width), 높은 식각률을 가지는 이방성 트랜치 구조를 얻는 것이다. 초기에는 주로 HBr chemistry를 이용한 연구가 진행되었는데 이는 식각률이 낮고 많은양의 식각부산물이 챔버와 시편에 재증착되는 문제가 발생하였다. 또한 SF6 chemistry의 사용을 통해 식각률의 향상은 가져왔지만 화학적 식각에 기인한 local bowing과 같은 이방성 식각의 문제점들로 인해 최근까지 CHF3, C2F6, C4F8, CF4등의 첨가가스를 이용하여 측벽에 Polymer layer의 식각보호막을 형성시켜 이방성 구조를 얻는 multi_step 공정이 일반화 되었다. 이에 본 연구에서는 SF6 chemistry와 소량의 02/HBr의 첨가가스를 이용한 single_step 공정을 통해 공정의 간소화 및 식각 프로파일을 개선하여 최적의 HAR 실리콘 식각공정 조건을 확보하고자 하였다.

• 조명전기설비학회논문지
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• 제27권2호
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• pp.84-94
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• 2013

In case when the existing TRIAC phase controlled dimmer is drove for the LED lighting equipments, there are many problems such as the LED flicker in low phase-angles, the acoustic noise and elements damage by increase of the peak voltage in the input filter capacitor, mulfunction by insufficiency of the TRIAC holding current, and the abnormal oscillation by LC resonant. In this paper, we proposes the single-stage quasi-resonant PSR(Primary Side Regulation) PWM converter, and the design, the simulation and experiment are performed. As a result, it could confirm that the proposed PWM converter is the lighting equipments for LED drive which can alternate the existing 60W class incandescent bulbs and it has the high drive performance of the efficiency 80% and over, the power factor 0.95 and over under the normal voltage 220V. Finally, total harmonic distortion(THD) is gratified with a standard[1] of the lighting equipments and the durability is evaluated as the high reliablilty of 150,000 hours and over.

• 전기의세계
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• 제17권3호
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• pp.29-38
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• 1968

The development of the frequency converter using semiconductor enables to easily control the speed of A.C. motors. It is now technically possible and economically feasible to provide them with power at variable frequency, using silicon-controlled-rectifier (or thyristor) inverters. In such a case, if an induction motor is to be operated efficiently over a wide speed range, it must be supplied from a variable-frequency source whose frequency is adjustable over a range similar to that required for the motor speed. It is desired to observe how several characteristics are changed such as primary current, torque-speed, etc. Although the characteristics could be obtained by means of the conventional method, it requires very complicated calculation. It is assumed that the charateristics above are easily investigated by means of current diagram method from variable circuit constants relating to the motor which is designed in rated frequency. In this paper, the results of the study on the current-diagram method and its application are described as follows; (1) In order to discuss the construction of current diagram, the equation of the stator current with adjustable frequency was derived for applying the Current Diagram Method. (2) The radius, the center of the current circle and current vector locus at any desired frequency could be easily determined with the aid of both above mentioned equation and the standard current diagram at reference frequency. (3) This method could be applicable to the various types of Induction Motors, and this paper has dealt with its application to the capacitor, split-phase and 2-phase types of motors.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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• pp.93-95
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• 2005

Coupling capacitor voltage transformers (CCVT) are widely used in high voltage power systems to obtain standard low voltage signal for protective relaying and measuring instruments. To obtain high accuracy, capacitances and inductances are tuned to the power system frequency, making a parallel resonant circuit. When no fault occurs, no distortion of the secondary voltage is generated. However, when a fault occurs, harmonics generated break the resonance between capacitances and inductance, which generates the distortion of the secondary voltage. This paper proposes an algorithm for compensating the secondary voltage of the CCVT. With the values of the secondary voltage of the CCVT, the secondary currents, the primary currents and the voltages across the capacitors and inductor are calculated. Test results indicate that the proposed algorithm can compensate the distorted secondary voltage of the CCVT, and is irrespective of the fault distance, the fault inception angle and the burden.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1070-1072
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• 2001

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator, in our project, we develop the power quality compensator of 150kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power qualify problems[1,2]. As a series and shunt compensator, power quality compensator consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage qualify in the series part. In this paper we present the design and control algorithm of power quality compensator. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 A
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• pp.351-353
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• 2004

In recent years, customers and power supplies are interested in power quality. Demands of customers are change from standard quality of distribution power system to various high quality of distribution power system. so, it is necessary to apply power quality compensator. in our project, we develop the UPQC(Unfied Power Quality Compensator of 45kVA which compensates power factor and voltage sag, interruption. it is very frequently occurred power quality $problems^{[1-3]}$ As a series and shunt compensator, UPQC consists of two inverters with common do link capacitor bank. It compensates the current quality in the shunt part and the voltage quality in the series part. In this paper, we present the design and control algorithm for 4SkVA UPQC system. As a control algorithm is implemented by digital controller, we consider sample-and-hold of signals. In this simulation, we use EMTDC/PSCAD V3.0 software which can simulate instantaneous voltage and current.

• International journal of advanced smart convergence
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• 제9권1호
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.267-273
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• 2007

A fractional-N frequency synthesizer supports quadruple bands and multiple standards for mobile broadcasting systems. A novel linearized coarse tuned VCO adopting a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth of 65%. The proposed technique successfully reduces the variations of KVCO and per-code frequency step by 3.2 and 2.7 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) logic is extensively utilized for high speed operation, low power consumption, and small silicon area. Implemented in $0.18-{\mu}m$ CMOS, the PLL covers $154{\sim}303$ MHz (VHF-III), $462{\sim}911$ MHz (UHF), and $1441{\sim}1887$ MHz (L1, L2) with two VCO's while dissipating 23 mA from 1.8 V supply. The integrated phase noise is 0.598 and 0.812 degree for the integer-N and fractional-N modes, respectively, at 750 MHz output frequency. The in-band noise at 10 kHz offset is -96 dBc/Hz for the integer-N mode and degraded only by 3 dB for the fractional-N mode.