• The Transactions of the Korea Information Processing Society
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• v.6 no.1
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• pp.159-166
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• 1999

In this paper, we examined noise figure and the 3rd order intercept point in sensitivity single tone desensitization, and response attenuation by intermodulation spurious of receiver and also analyzed them through simulation based on J-STD-0.18, which is the minimum specification of PCS mobile station. The result of simulation was as follows ; In sensitivity specification, the total noise figure was 5.99dB and the 3rd order intercept point was -33.979dB. Ins ingle tone desensitization and intermodulation spurious response attenuation specification, the total noise figure was 6.375dB and the 3rd order intercept point was -26.99dBm. When there is an interference tone, the nosie figure and the 3rd order intercept point have been increasedly 0.367dB respectively, compared wit that of no interference tone. Because the amount of increase in the 3rd order intercept point was highly raised more than that of noise figure, mixer, closely related to interference tone should be specified in high 3rd order intercept point. At a frequency spacing of 1.25MHz and 2.05MHz from center frequency in IF SAW filter, attenuation should be more than 45dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.2
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• pp.182-190
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• 2011

A amplitude modulation(AM) range measuring system utilizes the phase difference of the modulated envelope of the reflected signal to measure the distance. It is known that the AM system has a problem in accuracy due to antenna leakage signals and spurious reflection signals, but an AM range measurement system using an active reflector, which shifts the frequency bands, has been proposed in order to minimize the measurement errors due to spurious signals. In this paper, a new phase measurement module for the AM range measurement system, which enables to measure long distance with good accuracy, is proposed. The modulation frequency is alternatively selected between 8 and 1 MHz, and the measured distance range with this module is up to 150 m within 2 cm accuracy. A JK flip-flop circuit is used for higher phase accuracy, and an XOR circuit is used to cover long distance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.2
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• pp.258-264
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• 2011

In this paper, we designed a frequency synthesizer with a low phase noise and fast lock time and excellent spurious characteristics using the offset-PLL(Phase Locked Loop) that is used in GSM(Global System for Mobile communications). The proposed frequency synthesizer has low phase noise using three times down conversion and third offset frequency of this synthesizer is created by DDS(Direct Digital Synthesizer) to have high frequency resolution. Also, this synthesizer has fast switching speed using DAC(Digital to Analog Converter). but phase noise degraded due to DAC. we improved performance using the DAC noise filter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.2
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• pp.168-175
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• 1987

In this paper, a FFH-SS hybrid communication method using digital frequency synthesizer is proposed. This can simultaneously share the same frequency band with conventional band limited communication method without interference. In the experiment the selective hopping pattern is attained by some conbination of serial to parallel conversion of maximal code from pseudo random noise generater, and it is observed that the selective hopping band transition can be more easily achieved when the hop interval is nonuniform than it is uniform. Digital frequency synthesizer is now reported to have very poor spurious suppression ability below 50~60dB, the reason of this is observed from the experimental result, and the way of how to solve this problem is presneted.

• Publications of The Korean Astronomical Society
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• v.15 no.1
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• pp.35-60
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• 2000

We have analyzed the frequency sharing in the range of 71-275 GHz, which was adopted as a main topic of the WARC-2000 at the previous conference WARC-97. Though the technology of the active services has not been fully developed in this frequncy range, the heavy usage of this technology is expected in foreseeable future. To protect the passive services from spurious and out-of-band emissions of active services, realignment of the spectrum between 71 GHz and 275 GHz is strongly required. In addition, some effort should be made to allocate special bands for the radio astronomy service.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.417-420
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• 2001

In this paper, a transceiver using waveguide modules for 60 GHz band wireless LAN is implemented and analyzed. The characteristics of millimeter-wave transmitter are 0 dbm output power, 10.5 dB gain and 38 dBc spurious emition. The receiver's are 3.16 dB noise figure, 8.8 dB gain, -86dBm sensitivity. Maximum communication distance is more than loom. Intermediate frequency comply with IEEE 802.11b. The transfer of multimedia files is performed. The transceiver's data rate can vary with intermediate frequency bandwidth and the transceiver is designed more than 200 Mbps.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.3
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• pp.41-51
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• 1997

In this study, two types of the direct digital frequency synthesizers (DDFS) designed and implemented using 1.0.mu.m CMOS gatearray(SOG) technolgoies are interoduced. To analize the effect of the number of phase bits(L), address data bits(A), and DAC bits (D) on the output spectrums of the DDFSs, the NCO-based BCD-DDFS composed of L=24, A=14, and D=8, and the improved binary-DDFS composed of L=24, A=8, and D=10 have been studied. The chips have been designed with and without a noise shapper to reduce spurious noises due to phase truncation and reduced sine ROM in output spectrum.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.619-620
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• 2006

This paper presents a design of a 6-bit 2.704Gsamples/s D/A converter (DAC) for DS-CDMA UWB transceivers. The proposed DAC was designed with a current steering segmented 4+2 architecture for high frequency sampling rate. For low glitches, optimized deglitch circuit is adopted for the selection of current sources. The measured integral nonlinearity (INL) is -0.081 LSB and the measured differential nonlinearity (DNL) is -0.065 LSB. The DAC implemented in a 0.13um CMOS technology shows s spurious free dynamic range (SFDR) of 50dB from dc to Nyquist frequency. The prototype DAC consumes 28mW for a Nyquist sinusoidal output signal at a 2.704Gsamples/s. The chip has an active area of $0.76mm^2$.

• Journal of the Korea Institute of Military Science and Technology
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• v.10 no.2
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• pp.160-169
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• 2007

In this paper, we have described and simulated the effect analysis and correction of phase errors in the SAR rawdata induced by satellite attitude errors such as drift, jitter. This simulation is based on the FSA(Frequency Scaling Algorithm) for high resolution image formation of the Spotlight SAR. Phase errors produce the degradation of SAR image quality such as loss of resolution, geometric distortion, loss of contrast, spurious targets, and decrease in SNR. To resolve this problem, this paper presents method for correction of phase errors using the PGA(Phase Gradient Algorithm) in connection with the FSA. Several results of the phase errors correction are presented for Spotlight SAR rawdata.

• Journal of electromagnetic engineering and science
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• v.6 no.1
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• pp.62-70
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• 2006

This paper presents a new power plane design method incorporating a single geometry derived from a unit cell of photonic bandgap(PBG) structure. This method yields constantly wide suppression of parallel plate resonances from 0.9 GHz to 4.2 GHz and is very efficient to eliminate PCB resonances in a specified frequency region to provide effective suppression of simultaneous switching noise(SSN). It is shown that with only two cells the propagation of unwanted high frequency signals is effectively suppressed, while it could provide continuous return signal path. The measured results agree very well with theoretically predicted ones, and confirm that proposed method is effective for reducing EMI, with measured near-field distribution. The proposed topology is suitable for design of high speed digital system.