• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2007년도 한국컴퓨터종합학술대회논문집 Vol.34 No.1 (A)
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• pp.275-276
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• 2007

• 한국정보통신학회논문지
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• 제25권1호
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• pp.20-26
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• 2021

오늘날의 시스템들은 더 빠른 실행 속도와 더 적은 전력 소모를 위해 하드웨어와 소프트웨어 요소를 함께 포함하고 있다. 기존 하드웨어 및 소프트웨어 공동 설계에서 소프트웨어와 하드웨어의 비율은 설계자의 경험적 지식에 의해 나뉘었다. 설계자들은 반복적으로 가속기와 응용 프로그램을 재구성하고 시뮬레이션하며 최적의 결과를 찾는다. 설계를 변경하며 반복적으로 시뮬레이션하는 것은 시간이 많이 소모되는 일이다. 본 논문에서는 에너지 효율적인 FPGA 가속기 설계를 위한 하드웨어 및 소프트웨어 공동 설계 플랫폼을 제안한다. 제안하는 플랫폼은 가속기를 구성하는 주요 성분을 변수화해 응용 프로그램 코드와 하드웨어 코드를 자동으로 생성하여 설계자가 적절한 하드웨어 비율을 쉽게 찾을 수 있도록 한다. 공동 설계 플랫폼은 Xilinx Alveo U200 FPGA가 탑재된 서버에서 Vitis 플랫폼을 기반으로 동작한다. 공동 설계 플랫폼을 통해 1000개의 행을 가지는 두 행렬의 곱셈 연산 가속기를 최적화한 결과 응용프로그램보다 실행 시간이 90.7%, 전력 소모가 56.3% 감소하였다.

• 대한임베디드공학회논문지
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• 제14권2호
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• pp.87-96
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• 2019

Low power issue is one of the most critical problems in the Internet of Things (IoT), which are powered by battery. To solve this problem, various approaches have been presented so far. In this paper, we propose a method to reduce the power consumption by reducing the numbers of accesses into the flash memory consuming a large amount of power for on-chip software execution. Our approach is based on using cooperative logging structure to distribute the sampling overhead in single sensor node to adjacent nodes in case of rare-event applications. The proposed algorithm to identify event occurrence is newly introduced with negative feedback method by observing difference between past data and recent data coming from the sensor. When an event with need of flash access is determined, the proposed approach only allows access to write the sampled data in flash memory. The proposed event detection algorithm (EDA) result in 30% reduction of power consumption compared to the conventional flash write scheme for all cases of event. The sampled data from the sensor is first traced into the random access memory (RAM), and write access to the flash memory is delayed until the page buffer of the on-chip flash memory controller in the micro controller unit (MCU) is full of the numbers of the traced data, thereby reducing the frequency of accessing flash memory. This technique additionally reduces power consumption by 40% compared to flash-write all data. By sharing the sampling information via LoRa channel, the overhead in sampling data is distributed, to reduce the sampling load on each node, so that the 66% reduction of total power consumption is achieved in several IoT edge nodes by removing the sampling operation of duplicated data.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.561-564
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• 2004

The motion estimation which requires huge computation consumes large power in a video encoder. Although a number of fast-search algorithms are proposed to reduce the power consumption, the smaller the computation, the worse the performance they have. In this paper, we propose an architecture that a low energy management scheme can be applied with several fast-search algorithm. In addition. we show that ECVH, a software scheduling scheme which dynamically changes the search algorithm, the operating frequency, and the supply voltage using the remaining slack time within given power-budget, can be applied to the architecture, and show that the power consumption can be reduced.

• Journal of Information Processing Systems
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• 제8권1호
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• pp.133-144
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• 2012

In order to make cognitive radio systems a practical technology to be deployed in real-world scenarios, the core Software Defined Radio (SDR) systems must meet the stringent requirements of the target application, especially in terms of performance and energy consumption for mobile platforms. In this paper we present a feasibility study of hardware acceleration as an energy-efficient implementation for SDR. We identified the amplifier function from the Software Communication Architecture (SCA) for hardware acceleration since it is one of the functions called for most frequently and it requires intensive floating-point computation. Then, we used the Virtex5 Field-Programmable Gate Array (FPGA) to perform a comparison between compiler floating-point support and the on-chip floating-point support. By enabling the on-chip floating-point unit (FPU), we obtained as high as a 2X speedup and 50% of the overall energy reduction. We achieved this with an increase of the power consumption by no more than 0.68%. This demonstrates the feasibility of the proposed approach.

• 정보처리학회논문지:컴퓨터 및 통신 시스템
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• 제9권10호
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• pp.213-220
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• 2020

높은 사양이 필요한 하드웨어 기반의 모바일 및 IoT 임베디드 시스템은 저전력과 성능에 중요한 이슈를 갖고 있다. 이는 전력 소비로 발열량 증가 및 기기의 수명 단축 문제가 발생된다. 이러한 환경에서 소프트웨어도 제한된 전력, 메모리 등에서 안정적인 동작을 수행해야하므로 디바이스의 소비전력이 증가한다. 이를 해결하고자, 코드 관점에서 성능을 저하시키는 모듈을 식별하고, 그 모듈의 전력 최소화를 통한 성능 개선 가시화 방법을 제안한다. 이는 코드 가시화를 통해 복잡한 모듈(특히 Cyclomatic complexity, Coupling & Cohesion)을 식별하고, 저전력 코드 패턴화와 성능 코드를 간결화 한다. 이런 코드로 소비전력을 감소 및 성능 개선 함으로써 코드의 품질을 최적화 할 수 있다.

• 대한임베디드공학회논문지
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• 제17권6호
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• pp.375-382
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• 2022

This paper proposes a multi-core cooperative computing structure considering the heterogeneous features of automotive embedded on-chip software. The automotive embedded software has the heterogeneous execution flow properties for various hardware drives. Software developed with a homogeneous execution flow without considering these properties will incur inefficient overhead due to core latency and load. The proposed method was evaluated on an target board on which a automotive MCU (micro-controller unit) with built-in multi-cores was mounted. We demonstrate an overhead reduction when software including common embedded system tasks, such as ADC sampling, DSP operations, and communication interfaces, are implemented in a heterogeneous execution flow. When we used the proposed method, embedded software was able to take advantage of idle states that occur between heterogeneous tasks to make efficient use of the resources on the board. As a result of the experiments, the power consumption of the board decreased by 42.11% compared to the baseline. Furthermore, the time required to process the same amount of sampling data was reduced by 27.09%. Experimental results validate the efficiency of the proposed multi-core cooperative heterogeneous embedded software execution technique.

• 대한임베디드공학회논문지
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• 제9권4호
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• pp.245-251
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• 2014

Wireless Sensor Networks(WSNs) are applied to many monitoring applications. Present sensor nodes can perform many functions at the same time and contain complex software. During the lifetime of sensor nodes, they are required to reprogram their software because of their new functions, software, software bug fixes. The nodes are inaccessible physically or it is very difficult to upgrade their software by one by one. To upgrade the software of sensor nodes in WSNs remotely, this paper presents an energy efficient method by selecting an optimal relay node. The CHR(Cluster Head Relay) method is compared with SPIN and RANDOM method. Three methods are simulated in NS-2 with the same environmental parameters. Simulation results show that CHR shows faster update time and less power consumption compared with other two methods.

• 제어로봇시스템학회논문지
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• 제22권12호
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• pp.991-994
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• 2016

This paper presents a load management method based on OpenADR of smart grid. Previous demand side algorithm is restricted on reducing peak power. But, in this paper we suggest a method of performing the energy-saving control according to the power price utilizing building automatic control system installed on the customer side in the case of hourly differential pricing signal is transmitted to the open automated demand response system. And, we showed the integrated demand management software for 3 buildings.

• 조명전기설비학회논문지
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• 제30권3호
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• pp.94-105
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• 2016

The objective of the work was to evaluate the impact of lighting energy to cooling and heating consumption in medium scale office building, when currently installed fluorescent lights were replaced with various LED lighting fixtures. This evaluation comes from an integrated approach combining the proper indoor lighting environment and the thermal aspects of cooling & heating consumption in office building. These simulations were performed by coupling an appropriate luminaire analysis for energy consumption and a dynamic thermal simulation software (TRNSYS). To analyze comparative study of effects on the heating, cooling loads, and energy consumption of an LED lamp application, 2 types of LED lamp with low light power watt(LPW) 24W and high LPW 7.5W and a fluorescent lights(FL) with 37W are used respectively. Integrated building energy consumption decreased up to 3.2% when fluorescent lamps were replaced with LEDs. Thus, the high LPW of LED(7.5W) replaced with the same number of FL shows an effective energy saving and cost- effective luminary.