• Journal of Internet Computing and Services
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• v.20 no.6
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• pp.37-46
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• 2019

A test plan is a high level document detailing objectives, processes, schedules and so on for verifying a developed software. And a test strategy, a component of a test plan, is about how to test software products to guarantee its quality and find bugs in the software in advance. Therefore, establishing effective and suitable test strategies is important for elaborating test processes. However, these tasks are difficult for project managers who write a test plan if they were not trained well in software test processes. And mis-designed test strategies will also mislead entire testing behaviors that testers would do. As a result, there would be a low quality software product in the end. To solve this problem, we propose a new test strategy reuse technique in this paper. By utilizing test plans of already completed software development projects, we lead test planer to reuse suitable and effective test strategies which were used in previous projects. To do so, we evaluate existing test strategies by utilizing ISO/IEC 25010 quality model for evaluating the suitability of test strategies and also use effectiveness metrics for test strategies. And from these evaluations, we predict completeness of new test plan that is written by reused test strategies. It can help the project manager to write an appropriate test plan for the quality characteristics which are selected as objectives for testing and software product. We show the possibility of our approach by implementing a prototype into the existing framework in a case study.

• Journal of KIISE:Software and Applications
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• v.29 no.5
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• pp.295-310
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• 2002

Software architecture representing a common high-level abstraction of a system can be used as a basis for creating mutual understanding among all stakeholders of the system. In determining a software architecture's fitness with respect to its desired qualities as well as in improving a software architecture, software architecture evaluation is importantly performed. However moat of architecture evaluation methods are not still sufficient in that they do not explicitly consider artifacts discussed during architecture evaluation and their processes are net systematic. As a result, we are hard to follow them. To address these problems, this paper presents the method to evaluate systematically a software architecture with respect to its desired qualities. In this approach, the functional and non-functional requirements are separately handled, and software architecture is represented in the 4+1 view model using UML. Through this initial consideration, the important artifacts such as goals, scope, and target of evaluation are clearly determined. Also, the method provides the well defined process to produce the important evaluation artifacts such as sub-designs, design decisions, rationale, qualities from inputs. In addition, it enables us to determine satisfaction of a architecture with respect its desired qualities or improve a architecture through the structured evaluation results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.4
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• pp.476-483
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• 2014

This paper describes the operational analysis results of the bipolar DC distribution system coupled with the distributed generators. The energy management for AC/DC power trade and the operational principle of distributed generators and energy storages were first analyzed by computer simulation with PSCAD/EMTDC software. After then a hardware simulator for the bipolar DC distribution system was built, which is composed of the grid-tied three-level inverter, battery storage, super-capacitor storage, and the voltage balancer. Various experiments with the hardware simulator were carried out to verify the operation of bipolar DC distribution system. The developed simulator has an upper-level controller which operates in connection with the controllers for each distributed generator and the battery energy storage based on CAN communication. The developed hardware simulator are possible to use in designing the bipolar DC distribution system and analyzing its performance experimentally.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.8
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• pp.1046-1054
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• 2014

In this paper, a hardware prototype for the 10kVA 11-level MMC was built and various experimental works were conducted to verify the operation algorithms of MMC. The hardware prototype was designed using computer simulation with PSCAD/EMTDC software. After manufactured in the lab, the hardware prototype was tested to verify the modulation algorithms to form the output voltage, the balancing algorithm to equalize the sub-module capacitor voltage, and the redundancy operation algorithm to improve the system reliability. The developed hardware prototype can be utilized for analyzing the basic operation and performance improvement of MMC according to the modulation and redundancy operation scheme. It also can be utilize to analyze the basic operational characteristics of HVDC system based on MMC.

• Journal of Power Electronics
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• v.18 no.1
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• pp.56-69
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• 2018

In this paper, an improved Space Vector Modulation (SVM) based fault tolerant operation on a nine-level Cascaded H-Bridge (CHB) inverter with an additional backup circuit is proposed. Any type of fault in a power converter may result in a power interruption and productivity loss. Three different faults on H-bridge modules in all three phases based on the SVM approach are investigated with diagrams. Any fault in an inverter phase creates an unbalanced output voltage, which can lead to instability in the system. An additional auxiliary unit is connected in series to the three phase cascaded H-bridge circuit. With the help of this and the redundant switching states in SVM, the CHB inverter produces a balanced output with low harmonic distortion. This ensures high DC bus utilization under numerous fault conditions in three phases, which improves the system reliability. Simulation results are presented on three phase nine-level inverter with the automatic fault detection algorithm in the MATLAB/SIMULINK software tool, and experimental results are presented with DSP on five-level inverter to validate the practicality of the proposed SVM fault tolerance strategy on a CHB inverter with an auxiliary circuit.

• Advances in nano research
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• v.12 no.4
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• pp.387-403
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• 2022

Silica nanoparticles, which have a broad range of sizes and specific surface features, have been used in many industrial applications. This study was conducted to synthesize monodispersed silica nanoparticles directly from tetraethyl orthosilicate (TEOS) with an alkaline catalyst (NH₃) based on the sol-gel process and the Stöber method. A central composite design (CCD) is used to build a second-order (quadratic) model for the response variables without requiring a complete three-level factorial experiment. The process was then optimized to achieve the minimum particle size with the lowest concentration of TEOS. Dynamic light scattering and scanning electron microscopy were used to analyze the size, dispersity, and morphology of the synthesized nanoparticles. After optimization, a confirmation test was carried out to evaluate the confidence level of the software prediction. The results revealed that the predicted optimization is consistent with experimental procedures, and the model is significant at the 95% confidence level.

• Journal of the Korean Society of Safety
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• v.39 no.1
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• pp.70-81
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• 2024

With heavy rainfall due to extreme weather causing increasing damage, the importance of urban flood forecasting continues to grow. To forecast urban flooding accurately and promptly, a sewer network and surface grid with appropriate detail are necessary. However, for urban areas with complex storm sewer networks and terrain structures, high-resolution grids and detailed networks can significantly prolong the analysis. Therefore, determining an appropriate level of network simplification and a suitable surface grid resolution is essential to secure the golden time for urban flood forecasting. In this study, InfoWorks ICM, a software program capable of 1D-2D coupled simulation, was used to examine urban flood forecasting performance for storm sewer networks with various levels of simplification and different surface grid resolutions. The inundation depth, inundation area, and simulation time were analyzed for each simplification level. Based on the analysis, the simulation time was reduced by up to 65% upon simplifying the storm sewer networks and by up to 96% depending on the surface grid resolution; further, the inundation area was overestimated as the grid resolution increased. This study provides insights into optimizing the simplification level and surface grid resolution for storm sewer networks to ensure efficient and accurate urban flood forecasting.

• Journal of Software Assessment and Valuation
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• v.17 no.2
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• pp.11-17
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• 2021

In this study, problems of software completeness appraisal are pointed out and their solutions are presented by analyzing appraisal cases and judicial precedents. Completeness appraisal, ready-made appraisal, defect appraisal, and cost appraisal have been classified as and have been evaluated with extant software completeness appraisals. From a legal point of view, and in judicial precedents, however, there is a big difference between the definition of completeness and the completion rate. This is because the degree of completeness is evaluated under the premise that the software's development is complete, whereas the ready-made appraisal inspects the development progress of unfinished software. Often, in cases involving software completion rate, the total completion level is calculated by weighting each step of the software development process. However, completeness evaluations use the software's realization-operation as its sole criterion. In addition, another issue not addressed in existing software completeness appraisal cases is that there is no mention of who is responsible for software defects, whereas in case law, the responsible party is determined by finding who caused the dispute. In this paper, we systematically classify these problems, and present a novel evaluation method that separates software completeness evaluations from software completion evaluations.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.6 no.1
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• pp.33-38
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• 2006

In this paper, we propose a new architecture of Fuzzy Polynomial Neural Networks(FPNN) by means of genetically optimized Fuzzy Polynomial Neuron(FPN) and discuss its comprehensive design methodology involving mechanisms of genetic optimization, especially Genetic Algorithms(GAs). The conventional FPNN developed so far are based on mechanisms of self-organization and evolutionary optimization. The design of the network exploits the extended Group Method of Data Handling(GMDH) with some essential parameters of the network being provided by the designer and kept fixed throughout the overall development process. This restriction may hamper a possibility of producing an optimal architecture of the model. The proposed FPNN gives rise to a structurally optimized network and comes with a substantial level of flexibility in comparison to the one we encounter in conventional FPNNs. It is shown that the proposed advanced genetic algorithms based Fuzzy Polynomial Neural Networks is more useful and effective than the existing models for nonlinear process. We experimented with Medical Imaging System(MIS) dataset to evaluate the performance of the proposed model.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.4
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• pp.192-200
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• 2002

The performance of a PC cluster system is limited by the use of traditional communication protocols, such as TCP/IP because these protocols are accompanied with significant software overheads. To overcome the problem, systems based on user-level interface for message passing without intervention of kernel have been developed. The VIA(Virtual Interface Architecture) is one of the representative user-level interfaces which provide low latency and high bandwidth. In this paper, a VIA system is implemented on an SCI(Scalable Coherent Interface) network based PC cluster. The system provides both message-passing and shared-memory programming environments and shows the maximum bandwidth of 84MB/s and the latency of $8{\mu}s$. The system also shows better performance in comparison with other comparable computer systems in carrying out parallel benchmark programs.