• Title/Summary/Keyword: Soft fault

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A Study on Fault Mode Control of a Soft Recoil System (연식주퇴 시스템의 오류모드 제어기법에 관한 연구)

  • Shin, Chul-Bong;Bae, Jae-Sung;Hwang, Jai-Hyuk;Kang, Kuk-Jeong
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2008.04a
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    • pp.255-259
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    • 2008
  • A soft-recoil system, which is a new technology, can dramatically reduce a recoil force. Due to the inaccurate explosion, various fault modes may happen. These fault modes can cause the serious damage of the recoil system and must be suppressed to avoid them. In the present study, the fault mode control method of the soft-recoil system is investigated. A hydraulic damper is working under normal mode and a MR damper is additionally working when the fault modes happen. In the design of the fault mode controller, the detection method of the fault mode is important as well as its suppression. The results of the simulation show that the soft-recoil system performs when the fault modes happen.

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Soft Fault Detection Using an Improved Mechanism in Wireless Sensor Networks

  • Montazeri, Mojtaba;Kiani, Rasoul
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.12 no.10
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    • pp.4774-4796
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    • 2018
  • Wireless sensor networks are composed of a large number of inexpensive and tiny sensors used in different areas including military, industry, agriculture, space, and environment. Fault tolerance, which is considered a challenging task in these networks, is defined as the ability of the system to offer an appropriate level of functionality in the event of failures. The present study proposed an intelligent throughput descent and distributed energy-efficient mechanism in order to improve fault tolerance of the system against soft and permanent faults. This mechanism includes determining the intelligent neighborhood radius threshold, the intelligent neighborhood nodes number threshold, customizing the base paper algorithm for distributed systems, redefining the base paper scenarios for failure detection procedure to predict network behavior when running into soft and permanent faults, and some cases have been described for handling failure exception procedures. The experimental results from simulation indicate that the proposed mechanism was able to improve network throughput, fault detection accuracy, reliability, and network lifetime with respect to the base paper.

Analysis and Simplification of Fault Model for CMOS Operational Amplifier (CMOS 연산 증폭기의 고장 모델 분석 및 고장 집합의 간략화)

  • 김윤도;송근호;이효상;김강철;한석붕
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.349-352
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    • 1999
  • In this paper, we present simplified fault set which is made by analyzing fault relation to design specification in CMOS operational amplifier. The hard fault is easily modeled because an effect of hard fault is out of all design specification. However, the soft fault is not easily modeled because an effect of soft fault on design specification is varied according to position and depth of fault. We simulated hard and soft fault by HSPICE, varying threshold voltage and W/L ratio from 90% increase to 90% decrease. The decrease of test time and the production of high reliability mixed-mode IC are possible by the proposed fault set.

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Simulation-Based Fault Analysis for Resilient System-On-Chip Design

  • Han, Chang Yeop;Jeong, Yeong Seob;Lee, Seung Eun
    • Journal of information and communication convergence engineering
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    • v.19 no.3
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    • pp.175-179
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    • 2021
  • Enhancing the reliability of the system is important for recent system-on-chip (SoC) designs. This importance has led to studies on fault diagnosis and tolerance. Fault-injection (FI) techniques are widely used to measure the fault-tolerance capabilities of resilient systems. FI techniques suffer from limitations in relation to environmental conditions and system features. Moreover, a hardware-based FI can cause permanent damage to the target system, because the actual circuit cannot be restored. Accordingly, we propose a simulation-based FI framework based on the Verilog Procedural Interface for measuring the failure rates of SoCs caused by soft errors. We execute five benchmark programs using an ARM Cortex M0 processor and inject soft errors using the proposed framework. The experiment has a 95% confidence level with a ±2.53% error, and confirms the reliability and feasibility of using proposed framework for fault analysis in SoCs.

A Hybrid Soft Computing Technique for Software Fault Prediction based on Optimal Feature Extraction and Classification

  • Balaram, A.;Vasundra, S.
    • International Journal of Computer Science & Network Security
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    • v.22 no.5
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    • pp.348-358
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    • 2022
  • Software fault prediction is a method to compute fault in the software sections using software properties which helps to evaluate the quality of software in terms of cost and effort. Recently, several software fault detection techniques have been proposed to classifying faulty or non-faulty. However, for such a person, and most studies have shown the power of predictive errors in their own databases, the performance of the software is not consistent. In this paper, we propose a hybrid soft computing technique for SFP based on optimal feature extraction and classification (HST-SFP). First, we introduce the bat induced butterfly optimization (BBO) algorithm for optimal feature selection among multiple features which compute the most optimal features and remove unnecessary features. Second, we develop a layered recurrent neural network (L-RNN) based classifier for predict the software faults based on their features which enhance the detection accuracy. Finally, the proposed HST-SFP technique has the more effectiveness in some sophisticated technical terms that outperform databases of probability of detection, accuracy, probability of false alarms, precision, ROC, F measure and AUC.

A High-Frequency Signal Test Method for Embedded CMOS Op-amps

  • Kim Kang Chul;Han Seok Bung
    • Journal of information and communication convergence engineering
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    • v.3 no.1
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    • pp.28-32
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    • 2005
  • In this paper, we propose a novel test method to effectively detect hard and soft faults in CMOS 2-stage op-amps. The proposed method uses a very high frequency sinusoidal signal that exceeds unit gain bandwidth to maximize the fault effects. Since the proposed test method doesn't require any complex algorithms to generate the test pattern and uses only a single test pattern to detect all target faults, therefore test costs can be much reduced. The area overhead is also very small because the CUT is converted to a unit gain amplifier. Using HSPICE simulation, the results indicated a high degree of fault coverage for hard and soft faults in CMOS 2-stage op-amps. To verify this proposed method, we fabricated a CMOS op-amp that contained various short and open faults through the Hyundai 0.65-um 2-poly 2-metal CMOS process. Experimental results for the fabricated chip have shown that the proposed test method can effectively detect hard and soft faults in CMOS op-amps.

Probabilistic Soft Error Detection Based on Anomaly Speculation

  • Yoo, Joon-Hyuk
    • Journal of Information Processing Systems
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    • v.7 no.3
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    • pp.435-446
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    • 2011
  • Microprocessors are becoming increasingly vulnerable to soft errors due to the current trends of semiconductor technology scaling. Traditional redundant multi-threading architectures provide perfect fault tolerance by re-executing all the computations. However, such a full re-execution technique significantly increases the verification workload on the processor resources, resulting in severe performance degradation. This paper presents a pro-active verification management approach to mitigate the verification workload to increase its performance with a minimal effect on overall reliability. An anomaly-speculation-based filter checker is proposed to guide a verification priority before the re-execution process starts. This technique is accomplished by exploiting a value similarity property, which is defined by a frequent occurrence of partially identical values. Based on the biased distribution of similarity distance measure, this paper investigates further application to exploit similar values for soft error tolerance with anomaly speculation. Extensive measurements prove that the majority of instructions produce values, which are different from the previous result value, only in a few bits. Experimental results show that the proposed scheme accelerates the processor to be 180% faster than traditional fully-fault-tolerant processor with a minimal impact on overall soft error rate.

Cascaded Propagation and Reduction Techniques for Fault Binary Decision Diagram in Single-event Transient Analysis

  • Park, Jong Kang;Kim, Myoungha;Kim, Jong Tae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.65-78
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    • 2017
  • Single Event Transient has a critical impact on highly integrated logic circuits which are currently common in various commercial and consumer electronic devices. Reliability against the soft and intermittent faults will become a key metric to evaluate such complex system on chip designs. Our previous work analyzing soft errors was focused on parallelizing and optimizing error propagation procedures for individual transient faults on logic and sequential cells. In this paper, we present a new propagation technique where a fault binary decision diagram (BDD) continues to merge every new fault generated from the subsequent logic gate traversal. BDD-based transient fault analysis has been known to provide the most accurate results that consider both electrical and logical properties for the given design. However, it suffers from a limitation in storing and handling BDDs that can be increased in size and operations by the exponential order. On the other hand, the proposed method requires only a visit to each logic gate traversal and unnecessary BDDs can be removed or reduced. This results in an approximately 20-200 fold speed increase while the existing parallelized procedure is only 3-4 times faster than the baseline algorithm.

Dynamic Characteristics of a Soft Recoil System (연식주퇴 시스템의 동적 특성 해석)

  • Bae, Jae-Sung;Shin, Chul-Bong;Hwang, Jai-Hyuk;Kang, Kuk-Jeong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.11 no.4
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    • pp.13-19
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    • 2008
  • In order to reduce the level of recoil force, new recoil technology must be employed. The present study discusses a soft-recoil system that can reduce dramatically the recoil force. The firing sequence of the soft recoil system is radically different from that of a conventional system. The gun is latched and preloaded in its out-of-battery position prior to firing. When unlatched, the gun is accelerated and forward momentum is imparted to the recoiling parts. This momentum is opposed by the ballistic force imparted by firing and the recoil force and stoke will be reduced. In the present study, the soft-recoil system with hydraulic dampers is simulated and its characteristics are investigated theoretically. The results of the simulation show that the soft-recoil system could dramatically reduce the recoil force and the recoil stroke compared to the conventional recoil systems. However, the soft-recoil system was not able to perform well when the firing fault modes like prefire, hang-fire, and misfire happen. Hence, we need to employ a control algorithm to prevent the damage of the recoil system due to these fault mode.

A Study on Control of a Soft Recoil System for Recoil Force Reduction (사격충격력 저감을 위한 연식주퇴계의 제어에 관한 연구)

  • Shin, Chul-Bong;Bae, Jae-Sung;Hwang, Jai-Hyuk;Kang, Kuk-Jeong
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2007.11a
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    • pp.560-564
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    • 2007
  • In order to reduce the level of recoil force, new recoil technology must be employed. The present study discusses a soft-recoil mechanism that can reduce dramatically the recoil force. The dynamics of the soft-recoil system with hydraulic dampers are described and simulated. The results of the simulation show that FOOB system can reduce the recoil force and the recoil stroke compared to conventional systems. However, the FOOB system is not able to perform well when the fault modes happen. Hence, this study uses the MR damper to achieving FOOB under fault modes.

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