• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.1
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• pp.19-24
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• 2008

To reduce time-to-market, more and more embedded system developers and system-on-chip designers rely on microprocessor-based design methodology. ARM processor has been a major player in this industry over the last 10 years. However, there are many restrictions on developing embedded software using ARM processor in the early design stage. For those who are not familiar with embedded software development environment or who cannot afford to have an expensive embedded hardware equipment, testing their software on a real ARM hardware platform is a challenging job. To overcome such a problem, we have designed VMA (Virtual ARM Machine), which offers easier testing and debugging environment to ARM based embedded system developers. Major benefits that can be achieved by utilizing a virtual ARM platform are (1) reducing development cost, (2) lowering the entrance barrier for embedded system novices, and (3) making it easier to test and debug embedded software designs. Unlike many other purely software-oriented ARM simulators which are independent of real hardware platforms, VMA is specifically targeted on SYS-Lab 5000 ARM hardware platform, (designed by Libertron, Inc.), which means that VMA imitates behaviors of embedded software as if the software is running on the target embedded hardware as closely as possible. This paper will describe how VMA is designed and how VMA can be used to reduce design time and cost.

• International journal of advanced smart convergence
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• v.8 no.2
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• pp.8-17
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• 2019

The main purpose of this study isto explore the potential of affective computing (AC) platforms in education through two phases ofresearch: Phase I - platform analysis and Phase II - classification of academic emotions. In Phase I, the results indicate that the existing affective analysis platforms can be largely classified into four types according to the emotion detecting methods: (a) facial expression-based platforms, (b) biometric-based platforms, (c) text/verbal tone-based platforms, and (c) mixed methods platforms. In Phase II, we conducted an in-depth analysis of the emotional experience that a learner encounters in online video-based learning in order to establish the basis for a new classification system of online learner's emotions. Overall, positive emotions were shown more frequently and longer than negative emotions. We categorized positive emotions into three groups based on the facial expression data: (a) confidence; (b) excitement, enjoyment, and pleasure; and (c) aspiration, enthusiasm, and expectation. The same method was used to categorize negative emotions into four groups: (a) fear and anxiety, (b) embarrassment and shame, (c) frustration and alienation, and (d) boredom. Drawn from the results, we proposed a new classification scheme that can be used to measure and analyze how learners in online learning environments experience various positive and negative emotions with the indicators of facial expressions.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.59-62
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• 2003

The purpose of this paper is to present how to implement Segment_LCD display using SoC design. The SoC design is achieved by using an ARM_based Excalibur device. The Excalibur device offers an outstanding embedded development platform with ARM922T and FPA. The design in the Excailbur device uses the embedded AR띤 Processor core and the AMBA high-performance bus (AHH) to write to a memory-mapped slave peripheral in the FPGA portion of the device. Here, Segment_LCD is one kind of memory-mapped slave peripherals. In order to Implement the Segment_LCD display based on SoC design, four steps are fellowed. At first, IP modules are made by using Verilog HDL. Secondly, the ARM processor of the Excalibur is programmed using C in ADS (ARM Developer Suite). And in the third step, the whole system is simulated and verified. At last, modules are downloaded to SoCMaster kit. Both Quartus II software and ModelSim5.5e software are the key software tools during the design.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.747-748
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• 2006

In this paper, we describe photonic sensor interface and driver program based on SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. As for driver program development, three different methods are tried such as simple firmware, real-time OS based program and embedded Linux based program, and results are compared for SoC implementation.

• Journal of Fisheries and Marine Sciences Education
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• v.21 no.2
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• pp.269-277
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• 2009

Ventilation equipment performs a central role to maintain comfort subway environment. So ventilation equipment of Busan subway line No.1 is required to improve thermal environment. In this study, conditions of thermal environment are presented to improve ventilation equipment at existing subway station platforms by measuring thermal environment of platforms operated ventilation equipment at 14 stations of Busan subway line No.1. AWS of data in comparison with the neighbouring platforms and thermal environment analysis. Thermal environment status of subway platform analysis results are as follows. 1)Daytime platform temperature was higher than outdoor temperature, but night time platform temperature was lower than outdoor temperature. 2)Train wind had effect on improving thermal comfort in platform. 3)When outdoor temperature is below $24^{\circ}C$, inlet air is able to lower than platform temperature. 4)Considering existing ventilation system, night purge systems is useful to improving platform thermal environment.

• Proceedings of the KSME Conference
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• 2000.11a
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• pp.541-547
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• 2000

This paper presents the closed-form forward kinematics of the 6-6 Stewart platform of planar base and moving platform. Based on algebraic elimination method and with one extra linear sensor, it first derives an 8th-degree univariate equation and then finds tentative solution sets out of which the actual solution is to be selected. In order to provide more exact solution despite the error between measured sensor value and the theoretical one, a correction method is also used. The overall procedure requires so little computation time that it can be efficiently used for realtime applications. In addition, unlike the iterative schemes e.g. Newton-Raphson, the algorithm does not require initial estimates of solution and is free of the problems that it does not converge to actual solution within limited time. The presented method has been implemented in C language and a numerical example is given to confirm the effectiveness and accuracy of the developed algorithm.

• ETRI Journal
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• v.30 no.1
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• pp.129-140
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• 2008

In this paper, we propose a novel ant colony optimization (ACO)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip (SoCs), on the assumption that the test platform, including specific methods and configurations such as test packet routing, generation, and absorption, is installed. The ACO metaheuristic model, inspired by the ant's foraging behavior, can autonomously find better results by exploring more solution space. The proposed method efficiently combines the rectangle packing method with ACO and improves the scheduling results by dynamically choosing the test-access-mechanism widths for cores and changing the testing orders. The power dissipation and variable test clock mode are also considered. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce overall test time. Moreover, the computation time of the algorithm is less than a few seconds in most cases.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.93-100
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• 2008

In this paper, we address a novel simulated annealing(SA)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip(SoCs), on the assumption that the test platform proposed in [1] is installed. The proposed method efficiently mixed the rectangle packing method with SA and improved the scheduling results by locally changing the test access mechanism(TAM) widths for cores and the testing orders. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce the overall test time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.699-701
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• 2011

The Next-generation IT technology has been evolving from single technique to another which has merged, converging characteristics. The government categorized the 5 essential technologies to secure competitiveness in designing system semiconductors as smart motor vehicle info-tainment platform, smart TV multimedia system, smart phone analog interface technique, smart convergence digital communication and RF techniques, and advanced power management for smart devices. Also, it designated smart phone, smart TV, smart motor vehicle, and smart pad as the key industries. Such core techniques will become the key technologies of semiconductor design to secure the competitiveness of the next generation smart devices and the techniques can be transferred to fab-less design companies. In this contribution, we analyze the issues and the problems of the SoC design trends for smart motor vehicle info-tainment platforms.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.3
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• pp.619-626
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• 2019

The advances of semiconductor and circuitry technology dovetailed with nano processing techniques have further enhanced micro-miniaturization, sensitivity, longevity and reliability in MID(Medical Implant Device). Nevertheless, one of the remaining challenges is whether power can sufficiently and continuously be supplied for the operation of the MID. Self-powered MID that harvest biomechanical energy from human motion, respiratory and muscle movement are part of a paradigm shift. In this paper, we developed a rechargeable pacemaker through self-power generation with the triboelectric nanogenerator. We demonstrate a fully implanted pacemaker based on an implantable triboelectric nanogenerator, which act as a storage as well as active movement on a large-animal(dog) scale. The self-power pacemaker harvested from animal motion is 2.47V, which is higher than the required pacemaker device sensing voltage(1.35V).