• 대한전자공학회논문지SD
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• 제45권9호
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• pp.21-25
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• 2008

본 연구에서는 MOSFET의 RF 성능을 극대화하기 위해 단위 게이트 finger 폭($W_u$)에 대한 $f_T$ 및 $f_{max}$의 종속데이터를 측정하고 이 결과를 소신호 모델 파라미터들을 추출함으로써 새롭게 분석하였다. 이러한 물리적 분석결과로 $f_T$의 최대값이 존재하는 원인은 좁은 $W_u$에서 $W_u$에 무관한 parasitic gate-bulk capacitance와 넓은 $W_u$에서 트랜스컨덕턴스의 증가율이 감소하는 wide width effect에 의한 것임을 알 수 있다. 또한, $f_{max}$의 최대값은 게이트저항이 좁은 $W_u$에서 크게 줄어들고 넓은 $W_u$에서 점점 일정하게 되는 non-quasi-static effect에 의해 발생된다는 사실이 밝혀졌다.

• 대한조선학회논문집
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• 제52권6호
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• pp.452-459
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• 2015

It is important to use bench test results in the design process of anti-rolling tanks. Traditional bench tester is usually designed to perform only roll motions about a fixed axis and relatively small so that the viscous effects may not be neglected. Novel bench tester which could adjust the motion center to realize the coupled motion of sway and roll has been devised and manufactured therefore, large scaled bench tester could be utilized for designing the passive anti-rolling tanks. The time history of the reference signal from the rotation sensor of the bench tester have been recorded and processed to determine the phase angle to derive the Response Amplitude Operator(RAO) of the stabilized ship. The breadth of ART tank model should be large up to 2 m to diminish viscous scale effect and the vertical position of the tank can be varied with the ship's center of motion. The periods and the amplitude of roll motion can be varied from 1.5 sec to 5 sec and up to ±20°, respectively. The components of the tester was expressed in three dimensional digital mockup (DMU) and assembled together in the CAD space. The final configuration of the bench tester has been determined by confirming the smooth operation of the moving parts without interference through the animation in CAD space. New analytic logic are introduced for the determination of hydrodynamic moment and phase difference due to fluid motion in ART and verified through the test. The developed bench tester is believed to be effective and accurate for the verification of stabilization effect of ART taking into the consideration of the sway effect in the design stage.

• 인터넷정보학회논문지
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• 제15권4호
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• pp.1-8
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• 2014

무선 인체 센서 네트워크 시스템은 기존의 센서 네트워크 시스템과는 달리 장치가 소형이고 배터리 용량이 매우 제약적이다. 그리고 링크 채널의 특성, 센서 노드를 장착한 사람의 움직임, 부착된 센서 노드의 위치, 전송 전력을 조절하는 알고리즘 등에 따라 다양한 채널 환경이 형성될 수 있다. 따라서 이와 같은 제약사항 및 환경을 극복하고 센서 노드의 에너지를 효율적으로 관리하기위해 본 논문에서는 사람의 움직임과 센서 노드의 위치, 전송 전력 조절 알고리즘을 종합적으로 고려한 상태에서 최적의 전송 전력세기 값을 찾기 위한 실험을 수행한다. 그리고 실험의 결과를 바탕으로 에너지 소모와 패킷 전송률 측면에서 분석을 실시한다. 이를 통해 본 논문은 무선 인체 센서 네트워크 시스템에 적합한 수신 신호 세기 값과 그 값에 접근하기 위해 허용할 수 있는 수신 신호 세기의 범위 설정에 따른 효율성을 비교 평가한다.

• 전자공학회논문지A
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• 제30A권12호
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• pp.51-59
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• 1993

A 4${\times}10^{19}cm^{3}$ carbon-doped base AlGaAs/GaAs HBY was grown using carbontetracholoride(CCl$_4$) by atmospheric pressure MOCVD. Abruptness of emitter-base junction was characterized by SIMS(secondary ion mass spectorscopy) and the doping concentration of base layer was confirmed by DXRD(double crystal X-ray diffractometry). Mesa-type HBTs were fabricated using wet etching and lift-off technique. The base sheet resistance of R$_{sheet}$=550${\Omega}$/square was measured using TLM(transmission line model) method. The fabricated transistor achieved a collector-base junction breakdown voltage of BV$_{CBO}$=25V and a critical collector current density of J$_{O}$=40kA/cm$^2$ at V$_{CE}$=2V. The 50$\times$100$\mu$$^2$ emitter transistor showed a common emitter DC current gain of h$_{FE}$=30 at a collector current density of JS1CT=5kA/cm$^2$ and a base current ideality factor of ηS1EBT=1.4. The high frequency characterization of 5$\times$50$\mu$m$^2$ emitter transistor was carried out by on-wafer S-parameter measurement at 0.1~18.1GHz. Current gain cutoff frequency of f$_{T}$=27GHz and maximum oscillation frequency of f$_{max}$=16GHz were obtained from the measured Sparameter and device parameters of small-signal lumped-element equivalent network were extracted using Libra software. The fabricated HBT was proved to be useful to high speed and power spplications.

• 전기전자학회논문지
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• 제17권1호
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• pp.77-82
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• 2013

본 논문에서는 인덕터의 흐르는 전류를 감지하여 출력 전압을 일정하게 유지시키는 Peak Current-mode 방식의 DC-DC Buck Converter를 제안하고, 소신호 모델링에 기초하여 Power Stage 설계 방법과 시스템의 안정도를 설계하는 방법을 제안한다. 또한, dc-dc 컨버터의 신뢰성과 성능을 향상시키기 위해 보호회로를 추가하였다. 그리고 정전기 방지를 위하여 ESD 보호회로를 제안하였다. 제안된 보호회로는 게이트-기판 바이어싱 기술을 이용하여 낮은 트리거 전압을 구현하였다. 시뮬레이션 결과는 일반적인 ggNMOS의 트리거 전압(8.2V) 에 비해 고안된 소자의 트리거 전압은 4.1V 으로 더 낮은 트리거 전압 특성을 나타냈다. 본 논문에서 제안하는 회로의 시뮬레이션은 0.35um BCB 공정 파라미터를 이용하였고, Mathworks 사의 Mathlab과 Synopsys 사의 HSPICE 프로그램을 사용하여 검증하였다.

• Journal of Power Electronics
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• 제18권1호
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• pp.212-224
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• 2018

For maintaining a reliable and secure power system, this paper describes the design and implement of a single-phase grid-connected inverter with an enhanced phase-locked loop (PLL) and excellent power control performance. For designing the enhanced PLL and power regulator, a full-bridge voltage-controlled inverter (VCI) is investigated. When the grid frequency deviates from its reference values, the output frequency of the VCI is unstable with an oscillation of 2 doubling harmonics. The reason for this oscillation is analyzed mathematically. This oscillation leads to an injection of harmonics into the grid and even causes an output active power oscillation of the VCI. For eliminating the oscillation caused by a PLL, an oscillation compensation method is proposed. With the proposed method, the VCI maintains the original PLL control characteristics and improves the PLL robustness under grid frequency deviations. On the basis of the above analysis, a power regulator with the primary frequency and voltage modulation characteristics is analyzed and designed. Meanwhile, a small-signal model of the power loops is established to determine the control parameters. The VCI can accurately output target power and has primary frequency and voltage modulation characteristics that can provide active and reactive power compensation to the grid. Finally, simulation and experimental results are given to verify the idea.

• Biomolecules & Therapeutics
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• 제28권1호
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• pp.98-103
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• 2020

Marfan syndrome (MFS), a connective tissue disorder caused by mutations in the fibrillin-1 (Fbn1) gene, has vascular manifestations including aortic aneurysm, dissection, and rupture. Its vascular pathogenesis is assumed to be attributed to increased transforming growth factor β (TGFβ) signaling and blockade of excessive TGFβ signaling has been thought to prevent dissection and aneurysm formation. Here, we investigated whether galunisertib, a potent small-molecule inhibitor of TGFβ receptor I (TβRI), attenuates aneurysmal disease in a murine model of MFS (Fbn1^C1039G/+) and compared the impact of galuninsertib on the MFS-related vascular pathogenesis with that of losartan, a prophylactic agent routinely used for patients with MFS. Fbn1^C1039G/+ mice were administered galunisertib or losartan for 8 weeks, and their ascending aortas were assessed for histopathological changes and phosphorylation of Smad2 and extracellular signal-regulated kinase 1/2 (Erk1/2). Mice treated with galunisertib or losartan barely exhibited phosphorylated Smad2, suggesting that both drugs effectively blocked overactivated canonical TGFβ signaling in Fbn1^C1039G/+ mice. However, galunisertib treatment did not attenuate disrupted medial wall architecture and only partially decreased Erk1/2 phosphorylation, whereas losartan significantly inhibited MFS-associated aortopathy and markedly decreased Erk1/2 phosphorylation in Fbn1^C1039G/+ mice. These data unexpectedly revealed that galunisertib, a TβRI inhibitor, showed no benefits in aneurysmal disease in MFS mice although it completely blocked Smad2 phosphorylation. The significant losartan-induced inhibition of both aortic vascular pathogenesis and Smad2 phosphorylation implied that canonical TGFβ signaling might not prominently drive aneurysmal diseases in MFS mice.

• 한국컴퓨터정보학회논문지
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• 제11권4호
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• pp.35-45
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• 2006

본 논문에서는 휴대용 회전 유도탄 체계의 모델링과 성능분석에 사용할 수 있는 실시간 병렬처리 시뮬레이터 개발에 대하여 기술한다. 실시간 병렬처리 시뮬레이터는 항공기의 적외선 형상을 만드는 탐색기 에뮬레이터, 실시간 컴퓨터, 시스템 유닛. 유도 조종 장치 및 탐색기 프로세서 등과 같은 하드웨어 실물장치와 실시간 컴퓨터에 내장된 수학적 모델, 6 자유도 모델 및 공력 모델 등을 구현한 응용 소프트웨어 및 호스트 컴퓨터에 내장된 사용자 프로그램 등으로 구성되었다. 실시간 컴퓨터는 병렬로 연결된 여섯 개의 TI사 C-40 프로세서로 설계되었으며, 기계적 장치와 결합된 아날로그 전자회로를 이용하여 탐색기 에뮬레이터를 설계하였다. 시스템 유닛은 구성 요소간의 임피던스 정합 기능과 미세 신호를 처리하며, 시뮬레이터와 실물 유도탄 발사 장치의 연결이 가능하다. 개발된 실시간 병렬처리 시뮬레이터를 휴대용 회전 유도탄의 성능분석 장치로 사용하기 위하여 현장실험을 통한 결과 검증시험을 수행하였다.

• International Journal of Computer Science & Network Security
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• 제21권6호
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• pp.23-28
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• 2021

The article discusses the features of adaptation of the parameters of the physical layer of data transmission in self-organizing networks based on unmanned aerial vehicles operating in the conditions of "smart cities". The concept of cities of this type is defined, the historical path of formation, the current state and prospects for further development in the aspect of transition to "smart cities" of the third generation are shown. Cities of this type are aimed at providing more comfortable and safe living conditions for citizens and autonomous automated work of all components of the urban economy. The perspective of the development of urban mobile automated technical means of infocommunications is shown, one of the leading directions of which is the creation and active use of wireless self-organizing networks based on unmanned aerial vehicles. The advantages of using small-sized unmanned aerial vehicles for organizing networks of this type are considered, as well as the range of tasks to be solved in the conditions of modern "smart cities". It is shown that for the transition to self-organizing networks in the conditions of "smart cities" of the third generation, it is necessary to ensure the adaptation of various levels of OSI network models to dynamically changing operating conditions, which is especially important for the physical layer. To maintain an acceptable level of the value of the bit error probability when transmitting command and telemetry data, it is proposed to adaptively change the coding rate depending on the signal-to-noise ratio at the receiver input (or on the number of channel decoder errors), and when transmitting payload data, it is also proposed to adaptively change the coding rate together with the choice of modulation methods that differ in energy and spectral efficiency. As options for the practical implementation of these solutions, it is proposed to use an approach based on the principles of neuro-fuzzy control, for which examples of determining the boundaries of theoretically achievable efficiency are given.

• 한국인터넷방송통신학회논문지
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• 제22권4호
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• pp.67-72
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• 2022

본 논문에서는 60 nm GaN/Si HEMT 공정을 사용하여 전력증폭기(Power Amplifier)의 설계를 제시하였다. 고주파 설계를 위하여 맞춤형 트랜지스터 모델을 구성하였다. Output stage는 저손실 설계를 위해 마이크로스트립 라인을 사용하여 회로를 구성하였다. 또한 RC 네트워크로 구성된 Bias Feeding Line과 Input bypass 회로의 AC Ground(ACGND) 회로를 각각 적용하여 DC 소스에 연결된 노드의 최소임피던스가 RF회로에 영향을 미치지 않도록 하였다. 이득과 출력을 고려하여 3단의 구조로 설계되었다. 설계된 전력증폭기의 최종 사이즈는 3900 ㎛ × 2300 ㎛ 이다. 중심 주파수에서 설계된 결과는 12 V의 공급 전압에서 15.9 dB의 소 신호 이득, 29.9 dBm의 포화 출력(Psat), 24.2 %의 PAE를 달성하였다.