• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.1235-1237
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• 2003

For small capacity rectifier circuits as these for consumer electronics and appli capacitor input type rectifier circuits are gen used. Consequently. various harmonics gen within the power system become a serious pro Various studies of this effect have been pres previously. However. most of these employ swit devices, such as FETs and the like. The absen switching devices makes systems more toleran over -load, and brings low radio noise benefits propose a power factor correction scheme using resonant in commercial frequency without swit devices. In this method. It makes a sinusoidal by widening conduction period using the cu resonance in commercial frequency. Hence, harmonic characteristics can be significantly imp where the lower order harmonics. such as the and seventh orders are much reduced. The resu confirmed by the theoretical and experm implementations.

• Journal of Power Electronics
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• 제12권1호
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• pp.104-112
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• 2012

In this paper a new method for the design of a simple PI controller is presented and it has been applied in the control of a Boost based PFC rectifier. The Strength Pareto evolutionary algorithm, which is based on the Pareto Optimality concept, used in Game theory literature is implemented as a multi-objective optimization approach to gain a good transient response and a high quality input current. In the proposed method, the input current harmonics and the dynamic response have been assumed as objective functions, while the PI controller's gains of the PFC rectifier (Kpi, Tpi) are design variables. The proposed algorithm generates a set of optimal gains called a Pareto Set corresponding to a Pareto Front, which is a set of optimal results for the objective functions. All of the Pareto Front points are optimum, but according to the design priority objective function, each one can be selected. Simulation and experimental results are presented to prove the superiority of the proposed design methodology over other methods.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 추계학술대회
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• pp.169-170
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• 2011

PFC(Power Factor Correction) converters are commonly designed for CCM(Continuous Conduction Mode). However, DCM(Discontinuous Conduction Mode) appears in the input current near the ZCP(Zero Crossing Point) at light loads, resulting in input current distortion. It is caused by inaccurate average current values obtained in DCM. This paper studies a simple digital control scheme that can be operated in both CCM and DCM with minimal changes to the CCM average current control structure.

• 전자공학회논문지SC
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• 제44권6호
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• pp.57-65
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• 2007

본 논문에서는 DSP(TMS320F2812)를 사용하여 단상 역률개선을 디지털로 설계하였다. 이러한 승압형 역률개선 컨버터를 디지털로 구현하기 위하여 DSP는 컨버터의 입력전압과 인덕터전류, 컨버터의 출력전압이 필요하며 이를 DSP 내부에 있는 12비트 A/D변환기로 구현하였다. 승압을 위한 스위칭소자인 FET가 ON/OFF 될 때 심한 고주파 노이즈와 스위칭 리플이 발생한다. DSP에 의해 구현시 어느 시점에서 A/D 변환을 시작할지 결정하는 것은 대단히 중요하며 스위칭 노이즈가 발생하지 않는 곳에서 A/D 변환을 할 필요가 있다. PWM의 시비율(duty ratio)은 약 5 %에서 95 %까지 가변적이기 때문에 A/D 변환의 고정된 시작점을 찾을 수는 없다. 따라서 본 논문에서는 25 us 마다 PWM의 ON/OFF 폭을 미리 예측한 후 타이머를 이용하여 A/D 변환을 하도록 하였다. 실험 결과들로부터 광범위한 입력전압에 대하여 약 0.99의 역률과 80 Vdc 출력 전압에 대한 리플이 약 5 Vpp임을 확인하였다. 또한 윈도우즈 Xp 환경 하에서 수행되는 응용프로그램을 작성하여 원격에서 단상 PFC 컨버터의 각종 파라미터들과 전압 및 전류 제어기의 이득들을 모니터링하며 원격제어가 가능함을 보여 상용화의 가능성과 유용성을 제시하였다.

• Journal of Power Electronics
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• 제3권4호
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• pp.249-258
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• 2003

This paper presents a high-efficient and cost effective three-phase AC/DC-DC/AC power conversion system with a single two-switch type active Auxiliary Resonant DC Link (ARDCL) snubber circuit, which can minimize the total power dissipation. The active ARDCL snubber circuit is proposed in this paper and its unique features are described. Its operation principle in steady-state is discussed for the three phase AC/DC-DC/AC converter, which is composed of PWM rectifier as power factor correction (PFC) converter, sinewave PWM inverter. In the presented power converter system not only three-phase AC/DC PWM rectifier but also three-phase DC/AC inverter can achieve the stable ZVS commutation for all the power semiconductor devices. It is proved that the proposed three-phase AC/DC-DC/AC converter system is more effective and acceptable than the previous from the cost viewpoint and high efficient consideration. In addition, the proposed two-switch type active auxiliary ARDCL snubber circuit can reduce the peak value of the resonant inductor injection current in order to maximize total system actual efficiency by using the improved DSP based control scheme. Moreover the proposed active auxiliary two-switch ARDCL snubber circuit has the merit so that there is no need to use any sensing devices to detect the voltage and current in the ARDCL sunbber circuit for realizing soft-switching operation. This three-phase AC/DC-DC/AC converter system developed for UPS can achieve the 1.8% higher efficiency and 20dB lower conduction noise than those of the conventional three-phase hard-switching PWM AC/DC-DC/AC converter system. It is proved that actual efficiency of the proposed three-phase AC/DC-DC/AC converter system operating under a condition of soft switching is 88.7% under 10kw output power.