• Title/Summary/Keyword: Single-Phase PLL

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A Method to Improve the Performance of Phase-Locked Loop (PLL) for a Single-Phase Inverter Under the Non-Sinusoidal Grid Voltage Conditions (비정현 계통 전압하에서 단상 인버터의 PLL 성능 개선 방법)

  • Khan, Reyyan Ahmad;Ashraf, Muhammad Noman;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2017.11a
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    • pp.7-8
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    • 2017
  • The Phase-Locked Loop (PLL) is widely used in grid-tie inverter applications to achieve the synchronization between the inverter and the grid. However, its performance is deteriorated when the grid voltage is not pure sinusoidal due to the harmonics and the frequency deviation. Therefore it is important to design a high performance phase-locked loop (PLL) for the single phase inverter applications to guarantee the quality of the inverter output. In this paper a simple method to improve the performance of the PLL for the single phase inverter is proposed. The proposed PLL is able to accurately estimate the fundamental frequency component of the grid voltage even in the presence of harmonic components. In additional its transient response is fast enough to track a change in grid voltage within two cycles of the fundamental frequency. The effectiveness of the proposed PLL is confirmed through the PSIM simulation and experiments.

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A Method to Improve the Performance of Phase-Locked Loop (PLL) for a Single-Phase Inverter Under the Non-Sinusoidal Grid Voltage Conditions (비정현 계통 전압하에서 단상 인버터의 PLL 성능 개선 방법)

  • Khan, Reyyan Ahmad;Choi, Woojin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.4
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    • pp.231-239
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    • 2018
  • The phase-locked loop (PLL) is widely used in grid-tie inverter applications to achieve a synchronization between the inverter and the grid. However, its performance deteriorates when the grid voltage is not purely sinusoidal due to the harmonics and the frequency deviation. Therefore, a high-performance PLL must be designed for single-phase inverter applications to guarantee the quality of the inverter output. This paper proposes a simple method that can improve the performance of the PLL for the single-phase inverter under a non-sinusoidal grid voltage condition. The proposed PLL can accurately estimate the fundamental frequency and theta component of the grid voltage even in the presence of harmonic components. In addition, its transient response is fast enough to track a grid voltage within two cycles of the fundamental frequency. The effectiveness of the proposed PLL is confirmed through the PSIM simulation and experiments.

Digital PLL Control for Phase-Synchronization of Grid-Connected PV System (계통 연계형 태양광 발전 시스템의 위상 동기화를 위한 디지털 PLL 제어)

  • 김용균;최종우;김흥근
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.9
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    • pp.562-568
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    • 2004
  • The frequency and phase angle of the utility voltage are important in many industrial systems. In the three-phase system, they can be easily known by using the utility voltage vector. However, in the case of single phase system, there are some difficulties in detecting the information of utility voltage. In conventional system, the zero-crossing detection method is widely used, but could not obtain the information of utility voltage instantaneously. In this paper, the new digital PLL control using virtual two phase detector is proposed with a detailed analysis of single-phase digital PLL control for utility connected systems. The experimental results under various utility conditions are presented and demonstrate an excellent phase tracking capability in the single-phase grid-connected operation.

Performance Comparison of Single-Phase PLL Algorithms Using Virtual 2-Phase Strategy (가상 2상 방식을 사용한 단상 PLL 알고리즘의 성능 비교)

  • Lee, Yong-Seok;Lee, Dong-Min;Ji, Jun-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.2
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    • pp.219-225
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    • 2007
  • The frequency and phase angle of utility voltage represent very important information fur applications such as AC/DC converters and Uninterruptible Power Supplies(UPS). In a three-phase system, the utility voltage information can be easily obtained by using a utility voltage vector. However, in the case of a single-phase system. the utility voltage information is much harder to obtain. This paper presents a comparative study of single-phase PLL algorithms using virtual 2-phase strategy. Simulation and experimental results, including operation of the PLL structures introduced in reference papers, are presented to allow a performance comparison of the PLL algorithms.

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A novel PLL control method for robust three-phase thyristor converter under sag and notch conditions

  • Lee, Changhee;Yoo, Hyoyol
    • Proceedings of the KIPE Conference
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    • 2014.11a
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    • pp.87-88
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    • 2014
  • The paper presents a novel phase locked loop(PLL) control method for robust three-phase thyristor dual converters under sag, notch, and phase loss conditions. This method is applied to three line to line voltages of grid to derive three phase angle errors from three separated single-phase PLLs. They can substitute for abnormal phase to guarantee the synchronization in the various grid fault conditions. The performance of novel PLL with moving average method is verified through simulations.

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Performance Comparison of Single-Phase PLL Algorithms Using Virtual 2-Phase Strategy (가상 2상 방식을 사용한 단상 PLL 알고리즘의 성능 비교)

  • Lee, Yong-Seok;Ji, Jun-Keun
    • Proceedings of the KIEE Conference
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    • 2006.10d
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    • pp.226-228
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    • 2006
  • This paper presents a comparative study of single-phase PLL algorithms using virtual 2-phase strategy. Simulation and experimental results, including operation of the PLL structures introduced in reference papers, are presented to allow a performance comparison of the PLL algorithms.

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Performance Improvement of Single-phase PLL Control using State Observer (상태관측기를 이용한 단상 PLL제어의 성능 개선)

  • Hwang, Hee-Hun;Choi, Jong-Woo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.2
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    • pp.96-104
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    • 2009
  • This paper proposes a single-phase Phase-locked loop (PLL) of the virtual two phase generator using full-order state observer, which is essential to find phase and frequency of the single-phase source. The conventional methods cannot remove the low-order harmonics included in source voltage, which influencesto whole PLL control system. The proposed algorithm separates fundamental wave from harmonics, and removes harmonics effectively. Therefore it generates only the fundamental wave. As it controls virtual voltage and input voltage together, it decreases steady-state error. From simulation and experimental results, the generated frequency by the proposed PLL which it plans, converges to the actual value, and the steady-state error is much reduced under given harmonic voltages. It is also confirmed that the proposed algorithm removed harmonics effectively and it generates only the fundamental wave.

Analysis of Phase Error Effects Due to Grid Frequency Variation of SRF-PLL Based on APF

  • Seong, Ui-Seok;Hwang, Seon-Hwan
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.18-26
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    • 2016
  • This paper proposes a compensation algorithm for reducing a specific ripple component on synchronous reference frame phase locked loop (SRF-PLL) in grid-tied single-phase inverters. In general, SRF-PLL, which is based on all-pass filter to generate virtual voltage, is widely used to estimate the grid phase angle in a single-phase system. In reality, the estimated grid phase angle might be distorted because the phase difference between actual and virtual voltages is not 90 degrees. That is, the phase error is caused by the difference between cut-off frequency of all-pass filter and grid frequency under grid frequency variation. Therefore, the effects on phase angle and output current attributed to the phase error are mathematically analyzed in this paper. In addition, the proportional resonant (PR) controller is adapted to reduce the effects of phase error. The validity of the proposed algorithm is verified through several simulations and experiments.

Steady-State Performance Improvement of Single-Phase PWM Inverters Using PLL Technique (PLL 기법을 이용한 단상 PWM 인버터의 정상상태 성능개선)

  • 정세교;이대식
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.4
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    • pp.356-363
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    • 2004
  • This paper presents a precision voltage control technique of a single phase PWM inverter for a constant voltage and constant frequency(CVCF) applications. The proposed control scheme employs an additional phase-locked loop(PLL) compensator which is constructed using the output capacitor voltage and current. The computer simulation and experiment are carried out for the actual single-phase PWM inverter and it is well demonstrated from these results that the steady-state performance and total harmonic distortion(THD) are remarkably improved by employing the proposed technique.

Design of a High-performance High-pass Generalized Integrator Based Single-phase PLL

  • Kulkarni, Abhijit;John, Vinod
    • Journal of Power Electronics
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    • v.17 no.5
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    • pp.1231-1243
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    • 2017
  • Grid-interactive power converters are normally synchronized with the grid using phase-locked loops (PLLs). The performance of the PLLs is affected by the non-ideal conditions in the sensed grid voltage such as harmonics, frequency deviations and the dc offsets in single-phase systems. In this paper, a single-phase PLL is presented to mitigate the effects of these non-idealities. This PLL is based on the popular second order generalized integrator (SOGI) structure. The SOGI structure is modified to eliminate the effects of input dc offsets. The resulting SOGI structure has a high-pass filtering property. Hence, this PLL is termed as a high-pass generalized integrator based PLL (HGI-PLL). It has fixed parameters which reduces the implementation complexity and aids in the implementation in low-end digital controllers. The HGI-PLL is shown to have the lowest resource utilization among the SOGI based PLLs with dc cancelling capability. Systematic design methods are evolved leading to a design that limits the unit vector THD to within 1% for given non-ideal input conditions in terms of frequency deviation and harmonic distortion. The proposed designs achieve the fastest transient response. The performance of this PLL has been verified experimentally. The results agree with the theoretical prediction.