• Journal of Electrical Engineering and Technology
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• v.13 no.2
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• pp.711-721
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• 2018

This paper presents a single-phase asymmetric half-bridge cascaded multilevel inverter based series active power filter (SAPF) for harmonic voltage compensation. The effect of level number on performance of the proposed SAPF is examined in terms of total harmonic distortion (THD) and system efficiency. Besides, the relationship between the level number and the number of switching device are compared with the other multilevel inverter topologies used in APF applications. The paper is also aimed to demonstrate the capability of the SAPF for compensating harmonic voltages alone, without using a passive power filter (PPF). To obtain the required output voltage, a new switching algorithm is developed. The proposed SAPF with levels of 7, 15 and 31 is used in both simulation and experimental studies and the harmonic voltages of the load connected to the point of common coupling (PCC) is compensated under two different loading conditions. Furthermore, very high system efficiency values such as 98.74% and 96.84% are measured in the experimental studies and all THD values are brought into compliance with the IEEE-519 Standard. As a result, by increasing the level number of the inverter, lower THD values can be obtained even under high harmonic distortion levels while system efficiency almost remains the same.

• Journal of Power Electronics
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• v.17 no.3
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• pp.777-787
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• 2017

A new single phase half-bridge cascaded multilevel inverter based series active power filter (SAPF) is proposed. The main parts of the inverter are presented in detail. With the proposed inverter topology, any compensation voltage reference can be easily obtained. Therefore, the inverter acts as a harmonic source when the reference is a non-sinusoidal signal. A 31-level inverter based SAPF with the proposed topology, is manufactured and the voltage harmonics of the load connected to the point of common coupling (PCC) are compensated. There is no need for a parallel passive filter (PPF) since the main purpose of the paper is to represent the compensation capability of the SAPF without a PPF. It is aimed to compensate the voltage harmonics of the load fed by a non-sinusoidal supply using the proposed inverter. The validity of the proposed inverter based SAPF is verified by simulation as well as experimental study. The system efficiency is also measured in this study. Both simulation and experimental results show that the proposed multilevel inverter is suitable for SAPF applications.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1329-1337
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• 2015

By placing distributed generation power sources beside a big nonlinear load, these sources can be used as a power quality enhancer, while injecting some active power to the network. In this paper, a new scheme to use the distributed generation power source in both operation modes is presented. In this scheme, a fuzzy controller is added to adjust the optimal set point of inverter between compensating mode and maximum active power injection mode, which works based on the harmonic content of the nonlinear load. As the high order current harmonics can be easily rejected using passive filters, the DG is used to compensate the low order harmonics of the load current. Multilevel transformerless cascade inverters are preferred in such utilization, as they have more flexibility in current/voltage waveform. The proposed scheme is simulated in MATLAB/SIMULINK to evaluate the circuit performance. Then, a 1kw single phase prototype of the circuit is used for experimental evaluation of the paper. Both simulative and experimental results prove that such a circuit can inject a well-controlled current with desired harmonics and THD, while having a smaller switching frequency and better efficiency, related to previous 3-phase inverter schemes in the literature.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1608-1617
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• 2018

The rapid and correct isolation of faulty submodules (SMs) is of great importance for improving the reliability of modular multilevel converters (MMCs). Therefore, a fast diagnosis method containing fault detection and fault location determination was presented in this paper. An improved incremental predictive model of arm current was proposed to detect failures, and the multi-step prediction method was used to eliminate the negative impact of disturbances. Moreover, a control method was proposed to strengthen the fault characteristics to rapidly locate faulty arms and faulty SMs by detecting the variation rate of the SM capacitor voltage. The proposed method can rapidly and easily locate faulty SMs under different load conditions without the need for additional sensors. The experimental results have validated the effectiveness of the proposed method by using a single-phase MMC with four SMs per arm.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1552-1557
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• 2015

The paper unleashes a new idea to arrive at reduced switch count topological structures configured in the form of a matrix for a cascaded Multi level inverter (CMLI). The theory encircles to minimize the number of switches involved in the conduction path and there from acclaim reduced input current distortion, lower switching losses and electromagnetic interference. The focus extends to standardize the number of power devices required for reaching different levels of output voltage from the same architecture. It includes appropriate pulse width modulation (PWM) strategy to generate firing pulses and ensure the desired operation of the power modules. The investigative study carries with it MATLAB based simulation and experimental results obtained using suitable prototypes to illustrate the viability of the proposed concept. The promising nature of the performance projects a new dimension in the use of single phase MLIs for renewable energy related applications.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.5
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• pp.892-897
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• 2007

This paper presents the output filter design and the output characteristic analysis by cut-off frequency set up of the LCR filter on NPC multi-level inverter with trap-filter. The single-phase NPC three-level inverter operates at low switching frequency. The proposed LC trap filter is comprised of a conventional LCR output filter, by using LC trap filter the need for high damping resistor and low LC cut-off frequency is eliminated. Also. low damping resistor is increased the output filter system. The multilevel inverter system used NPC type inverter in proper system for high power application and controller is used DSP(TMS320C31). The effectiveness of proposed system confirmed the validity through SPICE simulation and experimental results.

• Journal of Power Electronics
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• v.17 no.4
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• pp.914-922
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• 2017

Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.333-334
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• 2015

본 논문은 단상 플라잉 커패시터 멀티레벨 인버터에서의 스위칭 상태 변화 횟수를 줄이는 새로운 기법을 제안하였다. 제안한 방법은 플라잉 커패시터 멀티레벨 인버터가 갖는 Redundant state 특성을 이용하며, 플라잉 커패시터 전압이 제어되는 범위 내에서 각 스위치가 최대한 적게 온/오프 하도록 Redundant state를 선택한다. 이를 단상 3-레벨 플라잉 커패시터 인버터에 적용하여 ＰＳＩＭ 시뮬레이션을 통해 유효성을 검증하였다.

• Journal of Power Electronics
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• v.17 no.3
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• pp.664-673
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• 2017

With the development of multilevel converters, cascaded single-phase H-bridge rectifiers (CHBRs) has become widely adopted in high-voltage high-power applications. In this study, sequence pulse modulation (SPM) is proposed for CHBRs. SPM is designed to balance the dc-link voltage and maintain the smooth changes of switch states. In contrast to phase disposition modulation, SPM balances the dc-link voltage even after removing the load of one submodule. The operation principle of SPM is deduced, and the unbalance degree of SPM is analyzed. All the proposed approaches are experimentally verified through a prototype of a four-module (nine-level) CHBR. Conclusions are drawn in accordance with the results of SPM and its imbalance degree analysis.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1519-1528
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• 2017

The paper proposes a well structured, component count waned single phase multilevel inverter (MLI) topology, which drives three different modules viz. Stipulation Based Sources Insertion (SBSI) module, Level Count Increasing (LCI) module and Inter-Linking H-Bridge (ILHB) module. The SBSI module confronts the number of basic sources needed in series/parallel to achieve required magnitude for any particular level. The LCI possesses an offsetting dc source and opuses to increase the number of levels and the ILHB module links the SBSI and LCI modules. A developed Hybrid Pulse Width Modulation (HPWM) strategy has PWM pulses for the switches of LCI module while the switches of the remaining two modules function at fundamental switching frequency. A fifteen level version of the proposed stipulation based sources insertion MLI (SBSIMLI) topology is simulated in MATLAB R2010a and a prototype of the similar specifications is constructed to validate the performance by experimental results. The comparison between the developed SBSIMLI topology and the competent topologies shows many interesting facts.