• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.151-154
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• 1999

In this paper, we showed parasitic effects in the millimeter wave package, and proposed a suppression method of parasitic effects using Si lossy layer. From CB-CPW used as a transmission line of the MIMIC package, PPL mode is generated and this causes the parasitic effects considered from this paper. Parasitic effects caused by PPL mode such as resonance, radiation, and crosstalk in the single and multi-chip package ran affect to the performance of MIMIC seriously. To suppress these parasitic effects, we adapted Si lossy layer $\rho$ . The PPL mode can be suppressed by the lossy layer, and it eliminates the parasitic effects. It is expected that showed results ran be used as luxurious data for design MIMICs and various types of millimeter wave applications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전력기술부문
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• pp.239-242
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• 2001

This paper presents a windows program package for solving security constrained OPF in interconnected power systems, which is based on the combined application of evolutionary programming(EP) and sequential quadratic programming(SQP). The objective functions are the minimization of generation fuel costs and system power losses. The control variables are the active power of the generating units, the voltage magnitude of the generator, transformer tap settings and SVC setting. The state variables are the bus voltage magnitude, the reactive power of the generating unit, line flows and the tie line flow. In OPF considering security, the outages are selected by contingency ranking method. The resulting optimal operating point has to be feasible after outages such as any single line outage(respect of voltage magnitude, reactive power generation and power flow limits). The OPF package proposed is applied to 10 machines 39 buses model system.

• Journal of Power Electronics
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• 제13권2호
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• pp.322-328
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• 2013

This paper presents a modified Current Source Parallel Resonant Push-pull Inverter (CSPRPI) for single phase induction heating applications. One of the most important problems associated with current source parallel resonant inverters is achieving ZVS in transient intervals. This paper shows that a CSPRPI with the integral cycle control method has dynamic ZVS. According to this method, it is the Phase Locked Loop (PLL) circuit that tracks the switching frequency. The advantages of this technique are a higher efficiency, a smaller package size and a low EMI in comparison with similar topologies. Additionally, the proposed modification results in a low THD of the ac-line current. It has been measured as less than %2. To show the validity of the proposed method, a laboratory prototype is implemented with an operating frequency of 80 kHz and an output power of 400 W. The experimental results confirm the validity of the proposed single phase induction heating system.

• 대한전기학회논문지:전력기술부문A
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• 제50권12호
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• pp.584-590
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• 2001

This paper presents a windows program package for solving security constrained OPF in interconnected Power systems, which is based on the combined application of evolutionary programming(EP) and sequential quadratic programming(SQP). The objective functions are the minimization of generation fuel costs and system power losses. The control variables are the active power of the generating units, the voltage magnitude of the generator, transformer tap settings and SYC setting. The state variables are the bus voltage magnitude, the reactive power of the generating unit, line flows and the tie line flow In OPF considering security, the outages are selected by contingency ranking method. The resulting optimal operating point has to be feasible after outages such as any single line outage(respect of voltage magnitude, reactive power generation and power flow limits). The OPF package proposed is applied to IEEE 14 buses and 10 machines 39 buses model system.

• Journal of Power Electronics
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• 제9권3호
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• pp.464-471
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• 2009

This paper introduces a new Motion-$SPM^{TM}$ (Smart Power Modules) module in Single In-line Package (SIP), which is a fully optimized intelligent integrated IGBT inverter module for up to 1kW low power motor drive applications. This module offers a sophisticated, integrated solution and tremendous design flexibility. It also takes advantage of pliability for the arrangement of heat-sink due to two types of lead forms. It comes to be realized by employing non-punch-through (NPT) IGBT with a fast recovery diode and highly integrated building block, which features built-in HVICs and a gate driver that offers more simplicity and compactness leading to reduced costs and high reliability of the entire system. This module also provides technical advantages such as the optimized cost effective thermal performances through IMS (Insulated Metal Substrate), the high latch immunity. This paper provides an overall description of the Motion-$SPM^{TM}$ in SIP as well as actual application issues such as electrical characteristics, thermal performance, circuit configurations and power ratings.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2002년도 International Symposium
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• pp.219-225
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• 2002

This paper presents a novel "bumpless flip chip package"for cost! performance driven devices. Using the conventional electroplating and etching processes, this package enables the production of fine pitch BGA up to 256 I/O with single layer routing. An array of circuitry down to $25-50{\mu}{\textrm}{m}$ line/space is fabricated to fan-in and fan-out of the bond pads without using bumps or substrate. Various types of joint methods can be applied to connect the fine trace and the bond pad directly. The resin-filled terminal provides excellent compliancy between package and the assembled board. More interestingly, the thin film routing is similar to wafer level packaging whereas the fan-out feature enables high lead count devices to be accommodated in the BGA format. Details of the design concepts and processing technology for this novel package are discussed. Trade offs to meet various cost or performance goals for selected applications are suggested. Finally, the importance of design integration early in the technology development cycle with die-level and system-level design teams is highlighted as critical to an optimal design for performance and cost.

• 한국생산제조학회지
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• 제24권4호
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• pp.448-454
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• 2015

In this paper, the band structural design that is typically in a line was arranged in a ring shape, so as to configure the high power LED lighting in such a way as to form a concentrated light distribution angle of less than 15 degrees. The parabolic aluminized reflector PAR38 that facilitates design using area and the area of the optical system to the same extent, applied a multiple light-source condenser lens optical system for the control of integration. The LED used here implemented a single linear light source using ans LED module with ans LED, flip-chip chip-scale package. The optical system was designed based on the energy star standard.

• 전자공학회논문지A
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• 제31A권10호
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• pp.94-100
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• 1994

By using the RAPHAEL 3D inductance calculation program RI3, the PGA package inductance values of INTEL i486 microprocessor have been extracted. The lead frame layouts are drawn using the mentor Boardstation and the output files are converted into the RI3 program input format of RAPHAEL. The power and ground planes of the PGA package are modeled y grid-line structures of single bars. The capacitance valuse of signal lines have been clalculated by using the RAPHAEL 2D/3D capacitance extraction program. The extraced L, C, R values have been converted into the SPICE netlist formats with lumped circuit model for future use in the signal ingegrity analysis.

• 한국전기전자재료학회논문지
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• 제16권7호
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• pp.647-655
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• 2003

Commonly used SAW duplexers have a difficulty on manufacture so that a transmission line is printed on the package or an LTCC multi-layer is needed because a quarter-wave transmission line which is a kind of an isolation network is applied to the SAW duplexers. In this study, new structures of one chip type SAW duplexers are proposed. In the proposed structure, Tx and Rx SAW ladder filters and isolation networks are located on a single 36LiTaO$_3$ piezoelectric substrate. The manufacture process is very simple than commonly used product. It is possible to improve tile performance by means of optimizing the micro-strip line lumped elements. It is easy to integrate and modulate with other surrounding components. The optimal design techniques can be applied to other kind of multi-port devices.

• 천문학논총
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• 제11권1호
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• pp.49-55
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• 1996

In order to discover the candidates of emission-line galaxies towards Hydra Void, objective-prism observations using U.K. Schmidt Telescope were carried out. To search the emission feature of [0III]${\lambda}{\lambda}4959,5007$ for all objects on the plate, all observed prism plates were scanned with APM at the Royal Observatory and the copied direct R plates were scanned with PDS Microdensitometer operating in the Inter- University Center for National Science Research Facilities. By utilizing the "XIMTOOL" package, both spectral and direct images for the same field were displayed simultaneously on up and down windows separately. In case of distinct emission features for a certain object, corresponding direct object on the other window was examined through eyeballing to see whether this object is a galaxy. Through this procedure, we discovered in total 33 candidates of emission-line galaxies in a single field.