• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.91-102
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• 2005

Recently, concurrent error detection for the processor becomes important. But it imposes too much overhead to adopt concurrent error detection capability on the system. In this paper, a new approach to resolve the problems of concurrent error detection is proposed. A loop detection scheme is introduced to reduce the repetitive loop iteration and memory access. To reduce the memory overheat an offset to calculate the target address of branching node is proposed. Performance evaluation shows that the new architecture has lower memory overhead and frequency of memory access than previous works. In addition, the new architecture provides the same error coverage and requires nearly constant memory size regardless of the size of the application program. Consequently, the proposed architecture can be used as an cost effective method to detect control flow errors in the commercial on the shelf products.

• Wind and Structures
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• v.35 no.4
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• pp.269-285
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• 2022

The pressure-mitigating effects of a high-speed train passing through a tunnel with a partially reduced cross-section are investigated via the numerical approach. A compressible, three-dimensional RNG k-ε turbulence model and a hybrid mesh strategy are adopted to reproduce that event, which is validated by the moving model test. Three step-like tunnel forms and two additional transitions at the tunnel junction are proposed and their aerodynamic performance is compared and scrutinized with a constant cross-sectional tunnel as the benchmark. The results show that the tunnel step is unrelated to the pressure mitigation effects since the case of a double-step tunnel has no advantage in comparison to a single-step tunnel, but the excavated volume is an essential matter. The pressure peaks are reduced at different levels along with the increase of the excavated earth volume and the peaks are either fitted with power or logarithmic function relationships. In addition, the Arc and Oblique-transitions have very limited gaps, and their pressure curves are identical to each other, whereas the Rec-transition leads to relatively lower pressure peaks in C_Pmax, C_Pmin, and ΔC_P, with 5.2%, 4.0%, and 4.1% relieved compared with Oblique-transition. This study could provide guidance for the design of the novel railway tunnel.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.2
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• pp.169-175
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• 2020

This paper studied the SET situation in VLSI because the electronic devices exposed to SET can indicate irregular operation and output errors. The SET environment was established using the exponential static wave (iexp) in the fold-cascode comparator. The comparator was experimented with how it affected it by the SET. In a folded comparator that did not enter the SET situation, the propagation delay was measured at 0.26㎲ and the gain was 0.649. The MOSFET close to the output stage was measured sensitively in the folded comparator that entered the SET situation. And propagation delay was calculated from 0.36 to 0.37㎲ and the gain was 0.649. The mid-position MOSFET was calculated from 0.28 to 0.30㎲ and the gain was 0.649. The MOSFET, which is farthest from the output stage from the folded comparator, was calculated with the propagation delay between 0.25 and 0.26㎲ and the gain of 0.649. In SET situations, the MOSFET close to the output portion of the folded comparator was sensitive. And at the MOSFET far from the output, the same results were obtained as a normal folded comparator without the SET input.