• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.12
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• pp.2806-2811
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• 2013

New technologies such as multi-antenna and small cell were proposed as key technology for the next generation mobile system to cope with the explosively increasing mobile data traffic. In particular, heterogeneous mobile communication network which can improve spatial reuse factor by exploiting macro and small cells simultaneously is attracting attention. However, the heterogeneous network has a problem that the utilization of small cells becomes low because the transmit power of macro base stations is much higher than that of small base stations and then the probability that mobile stations are attached to the macro base stations becomes high. This problem is dominant in uplink. The concept of cell range expansion bias to mitigate the problem was proposed by 3GPP and the corresponding standardization is in progress. In this paper, we analyze the downlink performance of the heterogeneous mobile communication network based on a system level simulator with the cell range expansion bias in terms of average cell spectral efficiency.

• Journal of KIISE:Software and Applications
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• v.28 no.3
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• pp.211-223
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• 2001

본 논문에서 제안하는 시나리오기반 검증기법의 목적은 UML로 작성된 객체지향 분석모델의 완전성 및 일관성을 진단하는 것이다. 검증기법의 전체 절차는 요구분석을 위한 Use Case 모델링 과정에서 생성되는 Use Case 시나리오와 UML 분석모델로부터 역공학적 방법으로 도출된 객체행위 시나리오와의 상호참조과정 및 시나리오 정보트리 추적과정을 이용하여 단계적으로 수행된다. 본 검증절차를 위하여 우선, UML로 작성된 객체지향 분석모델들은 우선 정형명세언어를 사용하여 Use Case 정형명세로 변환하다. 그 다음에, Use Case 정형명세로부터 해당 Use Case 내의 객체의 정적구조를 표현하는 시나리오 정보트리를 구축하고, Use Case 정형명세 내에 포함되어 있는 객체 동적행위 정보인 메시지 순차에 따라 개별 시나리오흐름을 시나리오 정보트리에 표현한다. 마지막으로 시나리오 정보트리 추적과 시나리오 정보 테이블 참조과정을 중심으로 완전성 및 일관성 검증작업을 수행한다. 즉, 검증하고자 하는 해당 Use Case의 시나리오 정보트리를 이용한 시나리오 추적과정을 통해 생성되는 객체행위 시나리오와 요구분석 과정에서 도출되는 Use Case 시나리오와의 일치여부를 조사하여 분석모델과 사용자 요구사양과의 완전성을 검사한다. 그리고, 시나리오 추적과정을 통해 수집되는 시나리오 관련종보들을 가지고 시나리오 정보 테이블을 작성한 후, 분석과정에서 작성된 클래스 관련정보들의 시나리오 포함 여부를 확인하여 분석모델의 일관성을 검사한다. 한편, 본 논문에서 제안하는 검증기법의 효용성을 증명하기 위해 대학의 수강등록시스템 개발을 위해 UML을 이용해 작성된 분석모델을 특정한 사례로써 적용하여 보았다. 프로세싱 오버헤드 및 메모리와 대역폭 요구량 측면에서 MARS 모델보다 유리함을 알 수 있었다.과는 본 논문에서 제안된 프리페칭 기법이 효율적으로 peak bandwidth를 줄일 수 있다는 것을 나타낸다.ore complicate such a prediction. Although these overestimation sources have been attacked in many existing analysis techniques, we cannot find in the literature any description about questions like which one is most important. Thus, in this paper, we quantitatively analyze the impacts of overestimation sources on the accuracy of the worst case timing analysis. Using the results, we can identify dominant overestimation sources that should be analyzed more accurately to get tighter WCET estimations. To make our method independent of any existing analysis techniques, we use simulation based methodology. We have implemented a MIPS R3000 simulator equipped with several switches, each of which determines the accuracy level of the

• Nuclear Engineering and Technology
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• v.53 no.8
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• pp.2534-2546
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• 2021

Nuclear emergency preparedness and response is an essential part to ensure the safety of nuclear power plant (NPP). Key support technologies of nuclear emergency decision-making usually consist of accident diagnosis, source term estimation, accident consequence assessment, and protective action recommendation. Source term estimation is almost the most difficult part among them. For example, bad communication, incomplete information, as well as complicated accident scenario make it hard to determine the reactor status and estimate the source term timely in the Fukushima accident. Subsequently, it leads to the hard decision on how to take appropriate emergency response actions. Hence, this paper aims to develop a method for rapid source term estimation to support nuclear emergency decision making in pressurized water reactor NPP. The method aims to make our knowledge on NPP provide better support nuclear emergency. Firstly, this paper studies how to build a Bayesian network model for the NPP based on professional knowledge and engineering knowledge. This paper presents a method transforming the PRA model (event trees and fault trees) into a corresponding Bayesian network model. To solve the problem that some physical phenomena which are modeled as pivotal events in level 2 PRA, cannot find sensors associated directly with their occurrence, a weighted assignment approach based on expert assessment is proposed in this paper. Secondly, the monitoring data of NPP are provided to the Bayesian network model, the real-time status of pivotal events and initiating events can be determined based on the junction tree algorithm. Thirdly, since PRA knowledge can link the accident sequences to the possible release categories, the proposed method is capable to find the most likely release category for the candidate accidents scenarios, namely the source term. The probabilities of possible accident sequences and the source term are calculated. Finally, the prototype software is checked against several sets of accident scenario data which are generated by the simulator of AP1000-NPP, including large loss of coolant accident, loss of main feedwater, main steam line break, and steam generator tube rupture. The results show that the proposed method for rapid source term estimation under nuclear emergency decision making is promising.

• KEPCO Journal on Electric Power and Energy
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• v.8 no.2
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• pp.159-179
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• 2022

Often a network becomes complex, and multiple entities would get in charge of managing part of the whole network. An example is a utility grid. While the entire grid would go under a single utility company's responsibility, the network is often split into multiple subsections. Subsequently, each subsection would be given as the responsibility area to the corresponding sub-organization in the utility company. The issue of how to make subsystems of adequate size and minimum number of interconnections between subsystems becomes more critical, especially in real-time simulations. Because the computation capability limit of a single computation unit, regardless of whether it is a high-speed conventional CPU core or an FPGA computational engine, it comes with a maximum limit that can be completed within a given amount of execution time. The issue becomes worsened in real time simulation, in which the computation needs to be in precise synchronization with the real-world clock. When the subject of the computation allows for a longer execution time, i.e., a larger time step size, a larger portion of the network can be put on a computation unit. This translates into a larger margin of the difference between the worst and the best. In other words, even though the worst (or the largest) computational burden is orders of magnitude larger than the best (or the smallest) computational burden, all the necessary computation can still be completed within the given amount of time. However, the requirement of real-time makes the margin much smaller. In other words, the difference between the worst and the best should be as small as possible in order to ensure the even distribution of the computational load. Besides, data exchange/communication is essential in parallel computation, affecting the overall performance. However, the exchange of data takes time. Therefore, the corresponding consideration needs to be with the computational load distribution among multiple calculation units. If it turns out in a satisfactory way, such distribution will raise the possibility of completing the necessary computation in a given amount of time, which might come down in the level of microsecond order. This paper presents an effective way to split a given electrical network, according to multiple criteria, for the purpose of distributing the entire computational load into a set of even (or close to even) sized computational loads. Based on the proposed system splitting method, heavy computation burdens of large-scale electrical networks can be distributed to multiple calculation units, such as an RTDS real time simulator, achieving either more efficient usage of the calculation units, a reduction of the necessary size of the simulation time step, or both.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.22 no.3
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• pp.38-50
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• 2023

Recent advances in artificial intelligence (AI) technology have enabled the integration of AI technology into image sensors, such as Closed-Circuit Television (CCTV), to detect specific traffic incidents. However, most incident detection methods have been carried out using fixed equipment. Therefore, there have been limitations to incident detection for all roadways. Nevertheless, the development of mobile image collection and analysis technology, such as image sensors and edge-computing, is spreading. The purpose of this study is to estimate the reducing effect of the incident detection time according to the introduction level of mobile image collection and analysis equipment (or connected vehicles). To carry out this purpose, we utilized data on the number of incidents collected by the Suwon branch of the Gyeongbu expressway in 2021. The analysis results showed that if the market penetration rate (MPR) of connected vehicles is 4% or higher for two-lane expressway and 3% or higher for three-lane expressways, the incident detection time was less than one minute. Furthermore, if the MPR is 0.4% or higher for two-lane expressways and 0.2% or higher for three-lane expressways, the incident detection time decreased compared to the average incident detection time announced by the Korea Expressway Corporation for both two-lane and three-lane expressways.

• Radiation Oncology Journal
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• v.17 no.2
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• pp.172-178
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• 1999

Purpose : To measure the basic structural characteristics of radiation oncology facilities in Korea during 1997 and to compare personnel, equipments and patient loads between Korea and developed countries. Methods and Materials : Mail serveys we conducted in 1998 and data on treatment machines, personnel and peformed new patients were collected. Responses were obtained from the 100 percent of facilities. The consensus data of the whole country were summarized using Microsoft Excel program. Results: In Korea during 1997, 42 facilities delivered megavoltage radiation theraphy with 71 treatment machines, 100 radiation oncologists, 26 medical physicist, 205 technologists and 19,773 new patients. Eighty nine percent of facilities in Korea had linear accelators at least 6 MeV maximum photon energy. Ninety five percent of facilities had simulators while five percent of facilities had no simulator, Ninety one percent of facilities had computer planning systems and eighty three percent of facilities reported that they had a written quality assurance program. Thirty six percent of facilities had only one radiation oncologist and thirty eight percent of facilities had no medical physicists. The median of the distribution of annual patients load of a facility, patients load per a machine, patients load per a radiation oncologist, patients load per a therapist and therapists per a machine in Korea were 348 patients per a year, 263 patients per a machine, 171 patients per a radiation oncologist, 81 patients per a therapist, and 3 therapists per a machine respectively. Conclusions : The whole scale of the radiation oncology departments in Korea was smaller than Japan and USA in population ratio regard. In case of hardware level like linear accelerators, simulators and computer planning systems, there was no big differences between Korea and USA. The patients loads of radiation oncologists and therapists had no significant differences as compared with USA. However, it was desirable to consider the part time system in USA because there were a lot of hospitals which did not employ medical physicists.

• Journal of KIISE:Information Networking
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• v.29 no.3
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• pp.286-298
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• 2002

The Remote Procedure Call(RPC) has been traditionally used for Inter Process Communication(IPC) among precesses in distributed computing environment. As distributed applications have been complicated more and more, the Mobile Agent paradigm for IPC is emerged. Because there are some paradigms for IPC, researches to evaluate and compare the performance of each paradigm are issued recently. But the performance models used in the previous research did not reflect real distributed computing environment correctly, because they did not consider the evacuation elements for providing security services. Since real distributed environment is open, it is very vulnerable to a variety of attacks. In order to execute applications securely in distributed computing environment, security services which protect applications and information against the attacks must be considered. In this paper, we evaluate and compare the performance of the Remote Procedure Call with that of the Mobile Agent in IPC paradigms. We examine security services to execute applications securely, and propose new performance models considering those services. We design performance models, which describe information retrieval system through N database services, using Petri Net. We compare the performance of two paradigms by assigning numerical values to parameters and measuring the execution time of two paradigms. In this paper, the comparison of two performance models with security services for secure communication shows the results that the execution time of the Remote Procedure Call performance model is sharply increased because of many communications with the high cryptography mechanism between hosts, and that the execution time of the Mobile Agent model is gradually increased because the Mobile Agent paradigm can reduce the quantity of the communications between hosts.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}