• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• ETRI Journal
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• v.25 no.6
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• pp.503-509
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• 2003

Selective epitaxial growth (SEG) of silicon has attracted considerable attention for its good electrical properties and advantages in building microstructures in high-density devices. However, SEG problems, such as an unclear process window, selectivity loss, and nonuniformity have often made application difficult. In our study, we derived processing diagrams for SEG from thermodynamics on gas-phase reactions so that we could predict the SEG process zone for low pressure chemical vapor deposition. In addition, with the help of both the concept of the effective supersaturation ratio and three kinds of E-beam patterns, we evaluated and controlled selectivity loss and non-uniformity in SEG, which is affected by the loading effect. To optimize the SEG process, we propose two practical methods: One deals with cleaning the wafer, and the other involves inserting dummy active patterns into the wide insulator to prevent the silicon from nucleating.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.9
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• pp.1013-1020
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• 1992

The conductivity variation of a high resistivity bulk silicon semiconductor, whose electrodes were deposited with aluminum vapor, was studied experimentally by measuring the X-ray intensity and current flow, which was developed by X-ray radiation while applying a pulse voltage to the silicon, in a load resistor connected to the semiconductor. The current flow observed immediately as the X-ray radiated, and when the X-ray decreased. It was found from the observation of switching current for the X-ray intensity and the voltage applied in the semiconductor that the switching current of the semiconductor increased as the intensity of the X-ray and the applied voltage increased. In case of lower applied voltage, the switching current for higher applied voltage depended on the intensity of the X-ray radiated due to the saturation of electron and hole.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.57-58
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• 2008

Microcrystalline (${\mu}c$) silicon thin films were prepared on glass by plasma-enhanced-chemical-vapor-deposition (PECVD) at various substrate temperature, and dilution ratio of $H_2$ with $SiH_4$. The structural and optical properties of. the ${\mu}c-Si$ thin films were investigated using XRD and UV-VIS spectrophotometer. The ${\mu}c-Si$ thin film with 42 nm grain size was grown at optimal condition of 2.5 Torr, spacing between electrodes of 3cm, deposition time of 3000s, RF power of 200W, substrate temperature of $350^{\circ}C$, $SiH_4$ ($20%SiH_4$+80%He) of 50sccm, and $H_2$ of 100sccm.

• ETRI Journal
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• v.19 no.1
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• pp.26-35
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• 1997

The substrate effects on solid-phase crystallization of amorphous silicon (a-Si) films deposited by low-pressure chemical vapor deposition (LPCVD) using $Si_2H_6$ gas have been extensively investigated. The a-Si films were prepared on various substrates, such as thermally oxidized Si wafer ($SiO_2$/Si), quartz and LPCVD-oxide, and annealed at 600$^{\circ}C$ in an $N_2$ ambient for crystallization. The crystallization behavior was found to be strongly dependent on the substrate even though all the silicon films were deposited in amorphous phase. It was first observed that crystallization in a-Si films deposited on the $SiO_2$/Si starts from the interface between the a-Si and the substrate, so called interface-interface-induced crystallization, while random nucleation process dominates on the other substrates. The different kinetics and mechanism of solid-phase crystallization is attributed to the structural disorderness of a-Si films, which is strongly affected by the surface roughness of the substrates.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.963-968
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• 2002

In this work, porous silicon (PS) layer is investigated as a sensing material to detect organic vapors such as ethanol (called alcohol), methanol, and acetone in low concentrations. To do this, PS sensors were fabricated. They have a membrane structure and comb-type electrodes were used to detect the change of electrical resistance effectively. PS layer on Si substrates was formed by anodization in HF solution of 25%. From fabricated sensors, current-voltage (Ⅰ-Ⅴ) curves were measured for gases evaporated from 0.1 to 0.5% organic solution concentrations at 36$\^{C}$. As the result, all curves showed rectifying behavior due to a diode structure between Si and the PS layer. The conductance of most sensors increased largely at high voltage of 5V, but the built-in potential on the measured Ⅰ-Ⅴ curve was lowered inversely by the adsorption effect of the organic vapors with high dipole moment.

• Journal of Advanced Marine Engineering and Technology
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• v.41 no.2
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• pp.146-149
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• 2017

Si clusters generated during the plasma chemical vapor deposition (CVD) process have a great influence on the quality of the fabricated films. In particular, in hydrogenated amorphous silicon thin films (a-Si:H) used for thin film solar cells, Si clusters are mainly responsible for light-induced degradation. In this study, we investigated the amount of clusters incorporated into thin films using a quartz crystal microbalance (QCM) and specially designed cluster eliminating filters, and investigated the effect of the DC grid mesh in preventing cluster incorporation. Experimental results showed that as the applied voltage of the grid mesh, which is placed between the electrode and the QCM, decreased, the number of clusters incorporated into the film decreased. This is due to the electrostatic force from the grid mesh bias, and this method is expected to contribute to the fabrication of high-quality thin films by preventing Si cluster incorporation.

• Journal of the Korean Ceramic Society
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• v.45 no.3
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• pp.142-145
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• 2008

The growth of amorphous silica nanowires by on-site feeding of silicon and oxygen is reported. The nanowires were grown on a nickel-coated oxidized silicon substrate without external silicon or oxygen sources. Transmission electron microscopy observation revealed that the nanowires, which have diameters of less than 50 nm and a length of several micrometers, were grown using a traditional vapor-liquid-solid mechanism. Blue photoluminescence was observed from these nanowires at room temperature. An approach to grow nanowires without external precursors may be useful when integrating nanowires into devices structures. This can benefit the fabrication of nanowire-based nanodevices.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.26 no.3
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• pp.410-416
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• 2002

The fluid flow, heat transfer and the local mass fraction of chemical species in the chemical vapor deposition(CVD) manufacturing process are studied numerically. Flow with a dilute precursor concentration of silane in hydrogen as the carrier gas enters to the reactor and deposits silicon onto the heated surface. The silicon deposition rate using silane is calculated in the horizontal or vertical, axisymmetric reactor. The effects of inlet carrier gas velocity, mass fraction of silane, susceptor angle and rotation of surface on the deposition rate are described.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.93-94
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• 2005

본 연구에서는 저온 공정에서 제작되는 소자에의 응용을 위하여 Inductively Coupled Plasma Chemical Vapor Deposition(ICP-CVD) 내에서 $N_2O$ 기체를 활용한 plasma oxidation을 통한 silicon 표면의 oxynitridation과 이로부터 tunnel gate dielectirics로 사용될 SiON 층을 형성하였으며, 형성된 SiOxNy 층의 전기적 특성을 측정하여 tunnel gate dielectrics로서 효과적인 기능을 수행함을 확인하였다. 형성된 박막의 성분 분석을 위하여 energy dispersive spectroscopy(EDS)를 이용하여 SiOxNy 층의 생성을 확인하였으며, 전기적인 특성을 통하여 tunnel gate dielectrics의 기능을 수행함을 알 수 있었다. 형성된 SiOxNy 층은 초박막 형태임에도 절연막으로서의 기능을 나타내었다.