• Title/Summary/Keyword: Silicon dry etching

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A Study on the Etcting Technology for Metal Interconnection on Low-k Polyimide (Low-k Polyimide상의 금속배선 형성을 위한 식각 기술 연구)

  • Mun, Ho-Seong;Kim, Sang-Hun;An, Jin-Ho
    • Korean Journal of Materials Research
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    • v.10 no.6
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    • pp.450-455
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    • 2000
  • For further scaling down of the silicon devices, the application of low dielectric constant materials instead of silicon oxide has been considered to reduce power consumption, crosstalk, and interconnection delay. In this paper, the effect of $O_2/SF_6$ plasma chemistry on the etching characteristics of polyimide-one of the promising low-k interlayer dielectrics-has been studied. The etch rate of polyimide decreases with the addition of $SF_6$ gas due to formation of nonvolatile fluorine compounds inhibiting reaction between oxygen and hydrocarbon polymer, while applying substrate bias enhances etching process through physical attack. However, addition of small amount of $SF_6$ is desirable for etching topography. $SiO_2$ hard mask for polyimide etching is effective under $O_2$plasma etching(selectivity~30), while $O_2/SF_6$ chemistry degrades etching selectivity down to 4. Based on the above results, $1-2\mu\textrm{m}$ L&S PI2610 patterns were successfully etched.

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A study on Dry Etching for Lage Area Multi-Cystalline Silicon Solar Cell (대면적 다결정 실리콘 태양전지 제작을 위한 건식식각에 관한 연구)

  • Han, Kyu-Min;Su, Jin;Yoo, Kwon-Jong;Kwon, Jung-Young;Choi, Sung-Jin;Lee, Hi-Deok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.243-243
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    • 2010
  • This paper two different etching, HF : HNO3 :DI and RIE were used for etching in multi-crystalline Silicon(Mc-Si) solar cell fabrication. The wafers etched in RIE texture showed low reflectance compared to the wafers etched in Acid soultion after SiNx deposition. In light current-voltage results, the cells etched in RIE texture exhibited higher short circuit current and open circuit voltage than those of the cells etched in acid solution. We have obtained 15.1% conversion efficiency in large area($156cm^2$) Multi-Si solar cells etched in RIE texture.

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Research on Fabrication of Silicon Lens for Optical Communication by Photolithography Process (포토리소그래피를 통한 광통신용 실리콘 렌즈 제작 및 특성 연구)

  • Park, Junseong;Lee, Daejang;Rho, Hokyun;Kim, Sunggeun;Heo, Jaeyeong;Ryu, Sangwan;Kang, Sung-Ju;Ha, Jun-Seok
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.2
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    • pp.35-39
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    • 2018
  • In order to improve the coupling efficiency, a collimator lens that collects the light emitted from the laser diode at a wide angle to the core of the optical fiber is essential. Glass mold method using a mold is widely used as a collimator lens currently used. Although this method is inexpensive to produce, it is difficult to form precisely and quality problems such as spherical aberration. In this study, the precision of surface processing was improved by replacing the existing glass mold method with the semiconductor process, and the material of the lens was changed to silicon suitable for the semiconductor process. The semiconductor process consists of a photolithography process using PR and a dry etching process using plasma. The optical coupling efficiency was measured using an ultra-precision alignment system for the evaluation of the optical characteristics of the silicon lens. As a result, the optical coupling efficiency was 50% when the lens diameter was $220{\mu}m$, and the optical coupling property was 5% or less with respect to the maximum optical coupling efficiency in the lens diameter range of $210-240{\mu}m$.

Dry etching of polysiliconin high density plasmas of $CI_2$ (고밀도 플라즈마를 사용한 $CI_2$/ Poly-Si 건식 식각)

    • Journal of the Korean Vacuum Society
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    • v.8 no.1
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    • pp.63-69
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    • 1999
  • The characteristic parameters of high density plasma source (Helical Resonator) have been measured with Langmuir probe to get the plasma density electron temperature, ion current density, etc. Optical emission spectra of Si and SiCl have been analyzed in $Cl_2$$/poly-Si system to elucidate etching mechanism. In this system, the main reaction to remove silicon atoms on the surface is proceeding mostly through chemical reaction, not pure physical reaction. The emission intensity of SiCl (chemical etching product) increases much faster than Si (pure physical etching product) with increasing the concentration of impurities (P). This is due to the electron transfer from substrate to the surface via Si-Cl bond. As a result, Si-Cl bond becomes more ionic and mobile, therefore the Cl-containing etchant forms $SiCl_x$ with surface more easily. Consequently, for the removal of Si atom from poly silicon surface, the chemical etching is more favorable than physical etching with increasing P concentrations.

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A selective formation of high-quality fully recessed oxide (양질의 FRO(fully recessed oxide)의 선택적 형성)

  • 류창우;심준환;이준희;이종현
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.149-155
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    • 1996
  • A new technique wasdeveloped which obtains selectively the htick fully recessed oxidized porous silicon layer (OPSL) with good dielectric property. The porous silicon layer was ocnverted to thick fully recessed oxide (FRO) with 3-step (1${\mu}$m, 1.5${\mu}$m, 1.8${\mu}$m) by multi-step thermal oxidation (after 400$^{\circ}$C, 1 hour by dry oxidation, 700$^{\circ}$C, 1 hour and then 1100$^{\circ}$C, 1 hour by wet oxidation). The breakdwon field of the FRO was about 2.5MV/cm and the leakage current was several pA ~ 100 pA in the range of 0 of 90 pF. The progress of oxidation of a porous silicon layer was studied by examining the infrared abosrption spectra. The refractive index (1.51) of the fRO, which was measured by ellipsometer, was comparable to that of the thermally grown silicon dioxide (1.46). The etching rate (1600${\AA}$/min) of the FRO was also almost equal to that of the thermal oxide.

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Effect of Si Wafer Ultra-thinning on the Silicon Surface for 3D Integration (삼차원 집적화를 위한 초박막 실리콘 웨이퍼 연삭 공정이 웨이퍼 표면에 미치는 영향)

  • Choi, Mi-Kyeung;Kim, Eun-Kyung
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.63-67
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    • 2008
  • 3D integration technology has been a major focus of the next generation of IC industries. In this study Si wafer ultra-thinning has been investigated especially for the effect of ultra-thinning on the silicon surface. Wafers were grinded down to $30{\mu}m\;or\;50{\mu}m$ thickness and then grinded only samples were compared with surface treated samples in terms of surface roughness, surface damages, and hardness. Dry polishing or wet etching treatment has been applied as a surface treatment. Surface treated samples definitely showed much less surface damages and better roughness. However, ultra-thinned Si samples have the almost same hardness as a bulk Si wafer.

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Fabrication and characteristics of photoluminescing Si prepared by spark process (Spark process법을 이용한 photoluminescence용 실리콘의 제조 및 특성)

  • 장성식;강동헌
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.5 no.3
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    • pp.299-305
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    • 1995
  • Visible photoluminescing (PL) silicon at room temperature has been prepared by a dry technique, that is, by spark processing, contrary to anodically etched porous silicon. PL peak maximum of photoluminescing spark processed Si was shifted to blue 520 nm. The stability of spark processed Si towards degradation upon UV radiation was found to be extremely high. Results from high resolution TEM, XRD and XPS studies suggest that spark processed silicon involves minute nanocrystalline (polycrystalline) particles which are imbedded in an amorphous matrix, preferably $SiO_2$.

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A Study of Machining Optimization of Parts for Semiconductor Plasma Etcher (반도체 플라즈마 식각 장치의 부품 가공 연구)

  • Lee, Eun Young;Kim, Moon Ki
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.28-33
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    • 2020
  • Plasma etching process employs high density plasma to create surface chemistry and physical reactions, by which to remove material. Plasma chamber includes silicon-based materials such as a focus ring and gas distribution plate. Focus ring needs to be replaced after a short period. For this reason, there is a need to find materials resistant to erosion by plasma. The developed chemical vapor deposition processing to produce silicon carbide parts with high purity has also supported its widespread use in the plasma etch process. Silicon carbide maintains mechanical strength at high temperature, it have been use to chamber parts for plasma. Recently, besides the structural aspects of silicon carbide, its electrical conductivity and possibly its enhanced life time under high density plasma with less generation of contamination particles are drawing attention for use in applications such as upper electrode or focus rings, which have been made of silicon for a long time. However, especially for high purity silicon carbide focus ring, which has usually been made by the chemical vapor deposition method, there has been no study about quality improvement. The goal of this study is to reduce surface roughness and depth of damage by diamond tool grit size and tool dressing of diamond tools for precise dimensional assurance of focus rings.

Design and Fabrication of Movable Micro-Fersnel Lens on XY-stage (XY-Stage에 의해 정적인 변위를 갖는 미세 프레넬 렌즈(Micro-Fresnel Lens)의 설계 및 제작)

  • Kim, Che-Heung;Ahn, Si-Hong;Lim, Hyung-Taek;Kim, Yong-Kweon
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2515-2517
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    • 1998
  • The micro fresnel lens(MFL) was modeled and fabricated on a XY-stage electrostatically driven by comb actuator. The modeled MFL was approximated as a step shape with 4-phase and 4-zone plate. The focal length and diameter of the MFL is 20mm and 912${\mu}m$, respectively. The XY-stage suspending the MFL is designed to generate a large static displacement up to about 20${\mu}m$. On SOI substrates, we first fabricated MFL using the RIE(reactive Ion etching) technology and then patterned and etched bulk silicon to make XY-stage. After the fabrication of all structures on top side of the SOI substrates. $Si_3N_4$ was deposited for passivation of all structures using PECVD(plasma enhanced chemical vapor deposition). All the MFL systems width comb drive actuator were released by KOH etching from the bottom side of the SOI wafer using double-sided alignment technique. In fabrication of MFL, a dry etching conditions is established in order to improve surface roughness and to control the etched depth.

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