• Title/Summary/Keyword: Signal processing circuit

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Implementation of Binaural Communication Open Platform for Binaural Hearing Aids Developing (양이 보청기 개발을 위한 양이 통신 오픈 플랫폼 구현)

  • Kim, Dong-Wook;Park, Ju-Man;Wei, Qun;Lim, Hyung-Gyu;Park, Hee-Joon;Seong, Ki-Woong;Lee, Jyung-Hyun;Kim, Myoung-Nam;Cho, Jin-Ho
    • Journal of Sensor Science and Technology
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    • v.20 no.4
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    • pp.272-278
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    • 2011
  • Recently, the performance of binaural hearing aids is rapidly improved with the technology advancement of wireless communication, digital signal processing, and integrated circuit design. However, the previous hearing aids developer platforms can't be applied to binaural hearing aids developing, because it has no consideration for wireless communication and binaural hearing control. Also, the previous developer platforms are not easy to use for the algorithm development, because programming languages are limited. In this paper, we designed and implemented the open platform board for binaural hearing aids developing. The designed board can be programmed by general programming language and can be used wireless communication module. In order to verify the designed open platform board, we used the volume control algorithm using two open platform board. As a result of experiment, we verified the performance of designed and implemented open platform board that was successfully operated the binaural hearing control and the wireless communication.

A Survey of Genetic Programming and Its Applications

  • Ahvanooey, Milad Taleby;Li, Qianmu;Wu, Ming;Wang, Shuo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.4
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    • pp.1765-1794
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    • 2019
  • Genetic Programming (GP) is an intelligence technique whereby computer programs are encoded as a set of genes which are evolved utilizing a Genetic Algorithm (GA). In other words, the GP employs novel optimization techniques to modify computer programs; imitating the way humans develop programs by progressively re-writing them for solving problems automatically. Trial programs are frequently altered in the search for obtaining superior solutions due to the base is GA. These are evolutionary search techniques inspired by biological evolution such as mutation, reproduction, natural selection, recombination, and survival of the fittest. The power of GAs is being represented by an advancing range of applications; vector processing, quantum computing, VLSI circuit layout, and so on. But one of the most significant uses of GAs is the automatic generation of programs. Technically, the GP solves problems automatically without having to tell the computer specifically how to process it. To meet this requirement, the GP utilizes GAs to a "population" of trial programs, traditionally encoded in memory as tree-structures. Trial programs are estimated using a "fitness function" and the suited solutions picked for re-evaluation and modification such that this sequence is replicated until a "correct" program is generated. GP has represented its power by modifying a simple program for categorizing news stories, executing optical character recognition, medical signal filters, and for target identification, etc. This paper reviews existing literature regarding the GPs and their applications in different scientific fields and aims to provide an easy understanding of various types of GPs for beginners.

Log Count Rate Circuits for Checking Electronic Cards in Low Frequency Band Reactor Power Monitoring (저주파수대의 원자로 출력신호 점검을 위한 대수 카운트레이트 회로)

  • Kim, Jong-ho;Che, Gyu-shik
    • Journal of Advanced Navigation Technology
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    • v.24 no.6
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    • pp.557-565
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    • 2020
  • In order for thermal degradationIn, excore nuclear flux monitoring system, as a monitoring and signal processing methodology of reactor power, monitors neutron pulses generated during nuclear fission as frequency status, and converts them into DC voltage, and then log values resultantly. The methods realy applied in the nuclear power plant are to construct combination of counters and flip-flops, or diodes and capacitors up to now. These methodes are reliable for relative high frequencies, while not credible for reasonable low frequencies or extreme low values. Therefore, we developed the circuit that converts frequencies into DC voltages, into and into log DC values in the wide range from low Hz to several hundred high kHz. We proved their validities through testing them using real data used in nuclear power plant and analyzed their results. And, these methods will be used to measure the neutron level of excore nuclear flux monitoring system in nuclear power plant.

A Study on Development of Off-Line Path Programming for Footwear Buffing Robot

  • Lho, Tae-Jung;Kang, Dong-Joon;Che, Woo-Seung;Kim, Jung-Young;Kim, Min-Sung
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.1469-1473
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    • 2004
  • We suggest how to program off-line robot path along shoes' outsole shape in the footwear buffing process by a 5-axis microscribe system like robot arms. This microscribe system developed consists a 5-axis robot link with a turn table, signal processing circuit, PC and an application software program. It makes a robot path on the shoe's upper through the movement of a microscribe with many joints. To do this, first it reads 5-encoder's pulse values while a robot arm points a shoes' outsole shape from the initial status. This system developed calculates the encoder pulse values for the robot arm's rotation and transmits the angle pulse values to the PC through a circuit. Then, Denavit-Hartenberg's(D-H) direct kinematics is used to make the global coordinate from robot joint one. The determinant is obtained with kinematics equation and D-H variable representation. To drive the kinematics equation, we have to set up the standard coordinates first. The many links and the more complicated structure cause the difficult kinematics problem to solve in the geometrical way. Thus, we can solve the robot's kinematics problems efficiently and systematically by Denavit-Hartenberg's representation. Finally, with the coordinate values calculated above, it can draw a buffing gauge-line on the upper. Also, it can program off-line robot path on the shoes' upper. We are subjected to obtaining shoes' outline points, which are 2 outlines coupled with the points and the normal vector based on the points. These data is supposed to be transformed into .dxf file to be used for data of automatic buffing robot. This system developed is simulated by using spline curves coupled with each point from dxf file in Autocad. As a result of applying this system to the buffing robot in the flexible footwear manufacturing system, it can be used effectively to program the path of a real buffing robot.

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The fabrication and evaluation of CdS sensor for diagnostic x-ray detector application (진단 X선 검출기 적용을 위한 CdS 센서 제작 및 성능 평가)

  • Park, Ji-Koon;Lee, Mi-Hyun;Choi, Young-Zoon;Jung, Bong-Zae;Choi, Il-Hong;Kang, Sang-Sik
    • Journal of the Korean Society of Radiology
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    • v.4 no.2
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    • pp.21-25
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    • 2010
  • Recently, various semiconductor compounds as radiation detection material have been researched for a diagnostic x-ray detector application. In this paper, we have fabricated the CdS detecton sensor that has good photosensitivity and high x-ray absorption efficiency among other semiconductor compounds, and evaluated the application feasibility by investigating the detection properties about energy range of diagnostic x-ray generator. We have fabricated the line voltage selector(LCV) for a signal acquisition and quantities of CdS sensor, and designed the voltage detection circuit and rectifying circuit. Also, we have used a relative relation algorithm according to x-ray exposure condition, and fabricated the interface board with DAC controller. Performance evaluation was investigated by data processing using ANOVA program from voltage profile characteristics according to resistive change obtained by a tube voltage, tube current, and exposure time that is a exposure condition of x-ray generator. From experimental results, an error rates were reduced according to increasing of a tube voltage and tube current, and a good properties of 6%(at 90 kVp) and 0.4%(at 320 mA) ere showed. and coefficient of determination was 0.98 with relative relation of 1:1. The error rate according to x-ray exposure time showed exponential reduction because of delayed response velocity of CdS material, and the error rate has 2.3% at 320 msec. Finally, the error rate according to x-ray dose is below 10%, and a high relative relation was showed with coefficient of determination of 0.9898.

A Problematic Bubble Detection Algorithm for Conformal Coated PCB Using Convolutional Neural Networks (합성곱 신경망을 이용한 컨포멀 코팅 PCB에 발생한 문제성 기포 검출 알고리즘)

  • Lee, Dong Hee;Cho, SungRyung;Jung, Kyeong-Hoon;Kang, Dong Wook
    • Journal of Broadcast Engineering
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    • v.26 no.4
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    • pp.409-418
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    • 2021
  • Conformal coating is a technology that protects PCB(Printed Circuit Board) and minimizes PCB failures. Since the defects in the coating are linked to failure of the PCB, the coating surface is examined for air bubbles to satisfy the successful conditions of the conformal coating. In this paper, we propose an algorithm for detecting problematic bubbles in high-risk groups by applying image signal processing. The algorithm consists of finding candidates for problematic bubbles and verifying candidates. Bubbles do not appear in visible light images, but can be visually distinguished from UV(Ultra Violet) light sources. In particular the center of the problematic bubble is dark in brightness and the border is high in brightness. In the paper, these brightness characteristics are called valley and mountain features, and the areas where both characteristics appear at the same time are candidates for problematic bubbles. However, it is necessary to verify candidates because there may be candidates who are not bubbles. In the candidate verification phase, we used convolutional neural network models, and ResNet performed best compared to other models. The algorithms presented in this paper showed the performance of precision 0.805, recall 0.763, and f1-score 0.767, and these results show sufficient potential for bubble test automation.

Design of a Inverter-Based 3rd Order ΔΣ Modulator Using 1.5bit Comparators (1.5비트 비교기를 이용한 인버터 기반 3차 델타-시그마 변조기)

  • Choi, Jeong Hoon;Seong, Jae Hyeon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.39-46
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    • 2016
  • This paper describes the third order feedforward delta-sigma modulator with inverter-based integrators and a 1.5bit comparator for the application of audio signal processing. The proposed 3rd-order delta-sigma modulator is multi-bit structure using 1.5 bit comparator instead of operational amplifier. This delta-sigma modulator has high SNR compared with single-bit 4th-order delta-sigma modulator in a low OSR. And it minimizes power consumes and simplified circuit structure using inverter-based integrator and using inverter-based integrator as analogue adder. The modulator was designed with 0.18um CMOS standard process and total chip area is $0.36mm^2$. The measured power cosumption is 28.8uW in a 0.8V analog supply and 66.6uW in a 1.8V digital supply. The measurement result shows that the peak SNDR of 80.7 dB, the ENOB of 13.1bit and the dynamic range of 86.1 dB with an input signal frequency of 2.5kHz, a sampling frequency of 2.56MHz and an oversampling rate of 64. The FOM (Walden) from the measurement result is 269 fJ/step, FOM (Schreier) was calculated as 169.3 dB.

A 32${\times}$32-b Multiplier Using a New Method to Reduce a Compression Level of Partial Products (부분곱 압축단을 줄인 32${\times}$32 비트 곱셈기)

  • 홍상민;김병민;정인호;조태원
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.6
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    • pp.447-458
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    • 2003
  • A high speed multiplier is essential basic building block for digital signal processors today. Typically iterative algorithms in Signal processing applications are realized which need a large number of multiply, add and accumulate operations. This paper describes a macro block of a parallel structured multiplier which has adopted a 32$\times$32-b regularly structured tree (RST). To improve the speed of the tree part, modified partial product generation method has been devised at architecture level. This reduces the 4 levels of compression stage to 3 levels, and propagation delay in Wallace tree structure by utilizing 4-2 compressor as well. Furthermore, this enables tree part to be combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, combined with four modular block to construct a CSA tree (carry save adder tree). Therefore, multiplier architecture can be regularly laid out with same modules composed of Booth selectors, compressors and Modified Partial Product Generators (MPPG). At the circuit level new Booth selector with less transistors and encoder are proposed. The reduction in the number of transistors in Booth selector has a greater impact on the total transistor count. The transistor count of designed selector is 9 using PTL(Pass Transistor Logic). This reduces the transistor count by 50% as compared with that of the conventional one. The designed multiplier in 0.25${\mu}{\textrm}{m}$ technology, 2.5V, 1-poly and 5-metal CMOS process is simulated by Hspice and Epic. Delay is 4.2㎱ and average power consumes 1.81㎽/MHz. This result is far better than conventional multiplier with equal or better than the best one published.

Highly Efficient 13.56 MHz, 300 Watt Class E Power Transmitter (13.56 MHz, 300 Watt 고효율 Class E 전력 송신기 설계)

  • Jeon, Jeong-Bae;Seo, Min-Cheol;Kim, Hyung-Chul;Kim, Min-Su;Jung, In-Oh;Choi, Jin-Sung;Yang, Youn-Goo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.8
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    • pp.805-808
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    • 2011
  • This paper presents a design of high-efficiency and high-power class E power transmitter. The transmitter is composed of 300 Watt class E power amplifier and AC-DC converter. The AC-DC converter converts 220 V and 60 Hz AC to a 290 V DC. The generated DC voltage is directly applied to a bias of the class E power amplifier. Because the converter does not have DC-DC converter unit, it has very high conversion efficiency of about 98.03 %. To minimize the loss at the output of the power amplifier, high-Q inductor was implemented and deployed to the output resonant circuit. As a result, the 13.56 MHz class E power amplifier has a high power-added efficiency of 84.2 % at the peak output power of 323.6 W. The overall efficiency of class E power transmitter, including the AC-DC converter, is as high as 82.87 %.

Analysis of Acoustic Reflectors for SAW Temperature Sensor and Wireless Measurement of Temperature (SAW 온도센서용 음향 반사판 분석 및 무선 온도 측정)

  • Kim, Ki-Bok;Kim, Seong-Hoon;Jeong, Jae-Kee;Shin, Beom-Soo
    • Journal of the Korean Society for Nondestructive Testing
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    • v.33 no.1
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    • pp.54-62
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    • 2013
  • In this study, a wireless and non-power SAW (surface acoustic wave) temperature sensor was developed. The single inter-digital transducer (IDT) of SAW temperature sensor of which resonance frequency is 434 MHz was fabricated on $128^{\circ}$ rot-X $LiNbO_3$ piezoelectric substrate by semiconductor processing technology. To find optimal acoustic reflector for SAW temperature sensor, various kinds of acoustic reflectors were fabricated and their reflection characteristics were analyzed. The IDT type acoustic reflector showed better reflection characteristic than other reflectors. The wireless temperature sensing system consisting of SAW temperature sensor with dipole antenna and a microprocessor based control circuit with dipole antenna for transmitting signal to activate the SAW temperature sensor and receiving the signal from SAW temperature sensor was developed. The result with wireless SAW temperature sensing system showed that the frequency of SAW temperature sensor was linearly decreased with the increase of temperature in the range of 40 to $80^{\circ}C$ and the developed wireless SAW temperature sensing system showed the excellent performance with the coefficient of determination of 0.99.