• Journal of the Semiconductor & Display Technology
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• v.14 no.2
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• pp.9-16
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• 2015

In this paper, selection criterions on selection diversity are researched. The diversity is applied to the multiple antenna system based on wireless access in vehicular environment (WAVE) standard for rapid varying channel. Least squares (LS) based decision feedback equalizer (DFE) are used for channel equalization. Received signal is regenerated by means of the decision feedback path. In the selection diversity, the regenerated signal as well as the received signal is selected according to selection criterion. The decision feedback algorithm can follow the fast speed of WAVE fading channel. To control the tracking speed of the time-varying channel, simple low pass filter is used. Finally, the estimated channel value recovers the distorted payloads. Signal power before automatic gain control (AGC) in analog stage can be used as a selection criterion. In the digital stage, signal power after AGC, noise power after AGC, signal to noise ratio after AGC and cross-correlation method can be used as selection criterions. According to the simulation results, the performance of the selection diversity is improved in comparison with that of the combining diversity for the WAVE fading channel.

• Journal of the Semiconductor & Display Technology
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• v.18 no.1
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• pp.59-64
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• 2019

Recently, time synchronous has become important for satellite launch control facilities, multiple thermal power plants, and power system facilities. Information from time synchronous at each of these industrial sites requires time synchronization to control or monitor the system with correlation. In this paper, IRIG-B codes, which can be used for time synchronous, are used as specifications in IRIG standard 200-16. Signals from IRIG-B120 (Analog), IRIG-B000 (Digital), and one PPS are output from GPS receiver. Using the signal from IRIG-B120 (Analog), it passes through the signal from the analog amplifier and generates one PPS signal using the field-programmable gate array. The FPGA is used cyclone EPM570T100I5N. According to IEEE regulations, the error of one PPS is specified within 1us, but in this paper, the error is within 100ns. The output of the one PPS signal was then compared and tested against the one PPS signal on the GPS receiver to verify accuracy and reliability. In addition, the proposed time synchronous is simple to construct and structure, easy to implement, and provides high time precision compared to typical time synchronous. The output of the one PPS signals and IRIG-B000 signal will be used in many industry sectors.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.94-98
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• 2023

In the case of high-speed data transmission on high multilayer boards, signal coherence is a problem, especially due to the via hole, and a solution to improve return loss or insertion loss by applying a back drill to the via hole is being proposed. In this paper, Near-Field Electromagnetic measurements were made on a high multilayer board to determine how the presence or absence of back drill affects signal consistency. For this purpose, we used a signal generator, spectrum analyzer, and EMC scanner on a test board to determine if it is possible to distinguish between areas with and without back drill in the via holes of the stubs on the board. Also, we analyzed the measured value of S11, S21 and EMC etc. for how much it improves the signal attenuation of the stub with back drill. Through this, we knew that less electromagnetic waves are generated the stub via with back drill. At future research, we will analyze how much it improves the signal loss and electromagnetic waves due to the depth of back drill.

• Journal of Digital Contents Society
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• v.6 no.3
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• pp.169-174
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• 2005

In this paper we propose efficient design and implementation of JPEG image display board that can display JPEG image on TV. we used NAND Flash Memory to save the compressed JPEG bit stream and video encoder to display the decoded JPEG mage on TV. Also we convert YCbCr to RGB to super impose character on JPEG image. The designed B/D is implemented using FPGA.

• Journal of Information Display
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• v.12 no.1
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• pp.61-67
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• 2011

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.

• Journal of Digital Contents Society
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• v.11 no.2
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• pp.277-282
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• 2010

In this paper, the wireless transmission module is developed to transmit oxygen saturation(SpO2) signal, acquired from bio-signal measuring module, to PC. This wireless transmission module is designed with closed type protocol instead of open type protocol such as a zigbee or a bluetooth, considering of the security of personal medical informations. The display software is also developed to display transmitted SpO2 signals by various type data and graph without information loss for a emergency transfer.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.69-79
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• 1998

In this paper, we have proposed a new row signal modulation method in order to display multi-gray image using super-twisted nematic liquid crystal display (STN-LCD), which has no complex computation, high selection ratio, and low driving voltage. By the proposed method, we have implemented a 320*240, 8-gray video-rate STN-LCD. For achieving a video-rate STN-LCD, 6 lines are selected at a time. Each row line is selected 8 times by equally distributed pulses throughout one frame. As a result, we can get 8 gray, video-rate image. The repetive horizontal pattern and the filckering was analyzed and the improvements have been presented.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1374-1382
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• 1995

In TFT-LCDs, as the display size area becomes larger, and the resolution higher, we have to consider the image degradation effects due to the incorporation of the TFT-LCD parameters such as the data-line resistance, the common electrode resistance, the data-line to common parasitic capacitance, and the output characteristics of driver ICs. One of the degradation effects is crosstalk resulting from the coupling between the source bus-line and common electrode. Since a source signal which represents a large number of display data is supposed to vary frequently, the common signal level is affected through the coupling effect, resulting in the degradation of nearby pixel drive signals. Therefore, we proposed a method to compensate for this source-common electrode coupling effect, we also designed and experimented the feasibility of our crosstalk compensation circuit in the actual TFT-LCD. We saw that the newly designed compensation circuit greatly reduced the crosstalk in display pattern image.

• Journal of the Korean Society for Aviation and Aeronautics
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• v.19 no.3
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• pp.16-24
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• 2011

In this research, a cockpit display system using 3 dimensional geographic information was developed. A coordinate transformation method from WGS84 to TM was first studied. Octree data structure was used for efficient 2D and 3D graphic display. Also, a 3D graphic engine was developed for fast display with large amount of geographic data which can be practically used in aircraft onboard computer having low performance. This 3D engine contains additional function such as geographic and object information loading, many kinds of camera mode, aircraft position and rotation control function, character strip display. In the future research, actual GPS signal should be used and additional information that can help pilot's decision should be display.

• Journal of IKEEE
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• v.23 no.3
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• pp.1038-1045
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• 2019

This paper describes high-speed duobinary transceiver design techniques which are widely used to increase data-rate despite limited channel bandwidth. At high data-rate, signal level is severely degraded as signal frequency becomes larger than the channel bandwidth. Mathematically, a duobinary signal has lower frequency components compared to a Non-Return-to-Zero signal for the same data-rate. Therefore, by using the duobinary signaling, the signal loss can be effectively reduced in physical channel environment as compared to the Non-Return-to-Zero signaling. The mathematical basis of duobinary signaling, and its applications to high-speed transceiver design are investigated in this paper.