• Title/Summary/Keyword: Signal block

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Design and Implementation of the module that generate Sync-signal for Controlling Tx/Rx Antenna of 2.3-2.7GHz WiMAX TDD Repeater (2.3-2.7GHz WiMAX용 TDD 중계기의 송수신 안테나 제어를 위한 동기 신호 생성 모듈 설계 및 구현)

  • Woo, Sang-Hee
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.1
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    • pp.60-63
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    • 2009
  • In this paper, Designed and implemented about module that generate division signal for uplink section and downlink section for controlling Tx/Rx antenna of 2.3-2.7GHz WiMAX TDD repeater. It is consisted of RF block and Baseband block, and because function of this module is that synchronize with WiMAX signal and create division signal for uplink section and downlink section, this module was designed only received path. And because of manufacturing of most RF block by one chip, this module could minimize area. And in baseband block, used the WiMAX Modem to detect Preamble and DL-MAP information of WiMAX signal. This design can process about 2.3-2.7GHz WiMAX.

The Design of Beam Forming Module for Active Phased Array Antenna System (능동위상배열안테나용 수신 빔 성형모듈 설계)

  • 정영배;엄순영;전순익;채종석
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.1
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    • pp.62-67
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    • 2003
  • This paper is concerned with the design of the beam forming module that is a key unit of the active phased array antenna(APAA) system for mobile satellite communications. This module includes two blocks for main signal and tracking signal. Main signal block has the role of transmitting input signal from phased array antenna to tracking signal block. And, tracking signal block executes main roles, beam forming of tracking signal and electronic beam control. The several electrical performances of this module, phase characteristics and linear gain, etc., agreed with specifications needed fur APAA, and for more clear verification of the performances, the satellite communication test of the APAA including the modules was accomplished in the outdoors.

A Clock Monitoring Logic Suggestion at the Synchronous System (동기 시스템에서의 Clock Monitoring Logic 제안)

  • Yoon Joo-Yeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.6 s.336
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    • pp.17-22
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    • 2005
  • It is important that we maintain the synchronous time-information with each other in the synchronous system. The most functions in the synchronous system need the time-information. n we have the wrong time-information, the system would operate incorrectly. So, we need to check if the time-information is correct or not in the important block of the synchronous system. In this paper, we will discuss how to check the clock signal and find some problem of it. Then, we will suggest the alternative plan.

Rapid Acquisition of CM and CL Code for GPS L2C Software Receivers

  • Kwon, Keum-Cheol;Shim, Duk-Sun
    • Journal of Electrical Engineering and Technology
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    • v.6 no.5
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    • pp.723-730
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    • 2011
  • The GPS modernization program offered a new civil signal on the L2 band, and the first modernized GPS Block IIR satellite was launched in September 2005. Currently, eight GPS Block IIRM satellites and two Block IIF satellites transmit L2C signal. The L2C signal contains two codes of CM and CL that are much longer than the L1 C/A code. Thus, the acquisition of the CM and CL codes takes more time compared with that of L1 C/A code. Under the assumption that the L2C signal is strong enough for detection, this paper suggests rapid acquisition methods for the GPS L2C signals for software receivers and compares its performance with that of other methods.

A VLSI DESIGN OF CD SIGNAL PROCESSOR for High-Speed CD-ROM

  • Kim, Jae-Won;Kim, Jae-Seok;Lee, Jaeshin
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1296-1299
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    • 2002
  • We implemented a CD signal processor operated on a CAV 48-speed CD-ROM drive into a VLSI. The CD signal processor is a mixed mode monolithic IC including servo-processor, data recovery, data-processor, and I-bit DAC. For servo signal processing, we included a DSP core, while, for CAV mode playback, we adopted a PLL with a wide recovery range. Data processor (DP) was designed to meet the yellow book specification.[2]So, the DP block consists of EFM demodulator, C1/C2 ECC block, audio processor and a block transferring data to an ATAPI chip. A modified Euclid's algorithm was used as a key equation solver for the ECC block To achieve the high-speed decoding, the RS decoder is operated by a pipelined method. Audio playability is increased by playing a CD-DA disc at the speed of 12X or 16X. For this, subcode sync and data are processed in the same way as main data processing. The overall performance of IC is verified by measuring a transfer rate from the innermost area of disc to the outermost area. At 48-speed, the operating frequency is 210 ㎒, and this chip is fabricated by 0.35 um STD90 cell library of Samsung Electronics.

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Signal Design of grouping Quasi-Orthogonal Space Time Block Codes on the Multi-dimensional Signal Space (다차원 신호 공간에서 그룹 준직교 시공간 블록 부호의 신호 설계)

  • Yeo, Seung-Jun;Heo, Seo-Weon;Lee, Ho-Kyoung
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.3
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    • pp.40-45
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    • 2008
  • This paper proposes the signal design techniques of quasi-orthogonal space time block codes (QO-STBCS) on the multi-dimensional signal space. In the multiple antenna system(MIMO), QO-STBC achieves the full-diversity and full-rate by grouping two based-symbols. We study the condition for the full-diversity of the grouping QO-STBC geometrically and the performance analysis of codes on the multi-dimensional signal space regarding the various signal constellations. Simulation results show that the way of the performance analysis is validity.

Additive Noise Reduction Algorithm for Mass Spectrum Analyzer (질량 스펙트럼 분석기를 위한 부가잡음제거 알고리즘)

  • Choi, Hun;Lee, Imgeun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.1
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    • pp.33-39
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    • 2018
  • An additive noise reduction algorithm for a mass spectrum analyzer is proposed. From the measured ion signal, we first used an estimated threshold from the mode of the measured signal to eliminate background noises with the white Gaussian characteristics. Also, a signal block corresponding to each mass index is constructed to perform a second order curve fitting and a linear approximation to signal block. In this process, the effective signal block composed of only the ion signal can be reconstructed by removing the impulsive noises and the sample signals which are insufficient to be viewed as normal ion signals. By performing curve fitting on the effective signal block, the noise-free mass spectrum can be obtained. To evaluate the performance of the proposed method, a simulation was performed using the signals acquired from the development equipment. Simulation results show the validity of the threshold setting from the mode and the superiority of the proposed curve fitting and linear approximation based noise canceling algorithm.

Study on the maintenance period allocation method for railway signal equipment (철도신호설비 유지보수주기 할당에 관한 연구)

  • Lee, Kang-Mi;Shin, Duck-O;Lee, Jae-Ho
    • Proceedings of the KSR Conference
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    • 2008.06a
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    • pp.647-652
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    • 2008
  • Railway signal system has been more complex, larger and required high reliability. So, maintenance by experience must be changed to optimize maintenance program or introduced systematic method for estabilish new maintenance program. In this paper, we introduced the maintenance period decision method which are Age based method and Block replacement method based on the failure distribution for the equipment. So, we allocated optimum maintenacne period for the railway signal equipment using block replacement method.

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Image quality enhancement using signal subspace method (신호 부공간 기법을 이용한 영상화질 향상)

  • Lee, Ki-Seung;Doh, Won;Youn, Dae-Hee
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.11
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    • pp.72-82
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    • 1996
  • In this paper, newly developed algorithm for enhancing images corrupted by white gaussian noise is proposed. In the method proposed here, image is subdivided into a number of subblocks, and each block is separated into cimponents corresponding to signal and noise subspaces, respectively through the signal subspace method. A clean signal is then estimated form the signal subspace by the adaptive wiener filtering. The decomposition of noisy signal into noise and signal subspaces in is implemented by eigendecomposition of covariance matrix for noisy image, and by performing blockwise KLT (karhunen loeve transformation) using eigenvector. To reduce the perceptual noise level and distortion, wiener filtering is implementd by adaptively adjusting noise level according to activity characteristics of given block. Simulation results show the effectiveness of proposed method. In particular, edge bluring effects are reduced compared to the previous methods.

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Design of An Amplifier using DGS Block (DGS 방식 DC Block을 이용한 증폭기의 설계)

  • 이경희;정용채
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.3
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    • pp.432-438
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    • 2001
  • In this paper, after applying Defected Ground Structure(DGS) to DC block, changes of gap and length of λ/4 coupled line are investigated by EM simulation and fabrication. As a result, on condition of the same output with the case using typical DC block, the gap between λ/4 coupled line is widen from 0.1 mm to 0.46 mm by 0.36 mm and the length of λ/4 coupled line gets shorter from 17.7 mm to 13.2 mm by 4.5 mm. Also three type power amplifiers using blocking capacitor, typical DC block and DGS DC block are fabricated and investigated. At first, when S parameter characteristics of each amplifier are considered at frequency band of 3.2 +-0.O5 GHz, every amplifier has similar characteristics of gain and S parameter. Second when the output power of amplifiers is 25 dBm after putting CW signal of 3.2 GHz into three type amplifiers, the difference of dominant signal and 2nd harmonic signal using blocking capacitor, typical DC block and DGS DC block is each -44.83 dBc, -66.84 dBc and -64.33 dBc. Therefore harmonic characteristics of amplifiers using typical DC block and DGS DC block is almost same.

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