• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2003.05a
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• pp.41-41
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• 2003

텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

• Journal of the Korean Vacuum Society
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• v.18 no.3
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• pp.203-207
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• 2009

Copper is known as a replacement for aluminum wire which is used for semiconductor. Because specific resistance of Cu ($1.67{\mu}{\Omega}$-cm) is lower than that of Al ($2.66{\mu}{\Omega}$-cm), Cu reduce RC delay time. Although melting point of Cu($1085^{\circ}C$) is higher than melting point of Al, Cu have characteristic to easily react with Silicon(Si) in low temperature, and it isn't good at adhesive strength with Si. For above these reason, research of diffusion barrier to prevent reaction between Cu and Si and to raise adhesive strength is steadily advanced. Our study group have researched on W-C-N (tungsten-carbon-nitrogen) Diffusion barrier for preventing diffusion of Cu through semiconductor. By recent studies, It's reported that W-C-N diffusion barrier can even precent Cu and Si diffusing effectively at high temperature. In this treatise, we vaporized different proportion of N into diffusion barrier to research Cu's Electromigration based on the results and studied surface hardness in the heat process using nano scale indentation system. We gain that diffusion barrier containing nitrogen is more stable for Cu's electromigration and has stronger surface hardness in heat treatment process.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.100-100
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• 2011

2004년 일본의 Hosono 그룹에 의해 처음 발표된 이래로, amorphous gallium-indium-zinc oxide (a-GIZO) thin film transistors (TFTs)는 높은 이동도와 뛰어난 전기적, 광학적 특성에 의해 큰 주목을 받고 있다. 또한 넓은 밴드갭을 가지므로 가시광 영역에서 투명한 특성을 보이고, 플라스틱 기판 위에서 구부러지는 성질에 의해 플랫 패널 디스플레이나 능동 유기 발광 소자(AM-OLED), 투명 디스플레이에 응용될 뿐만 아니라, 일반적인 Poly-Si TFT에 비해 백플레인의 대면적화에 유리하다는 장점이 있다. 최근에는 Y2O3나 ZrO2 등의 high-k 물질을 gate insulator로 이용하여 높은 캐패시턴스를 유지함과 동시에 낮은 구동 전압과 빠른 스위칭 특성을 가지는 a-GIZO TFT의 연구 결과가 보고되었다. 하지만 투명 디스플레이 소자 제작을 위해 플라스틱이나 유리 기판을 사용할 경우, 기판 특성상 공정 온도에 제약이 따르고(약 $300^{\circ}C$ 이하), 이를 극복하기 위한 부가적인 기술이 필수적이다. 본 연구에서는 p-type Si을 back gate로 하는 Inverted-staggered 구조의 a-GIZO TFT소자를 제작 하였다. p-type Si (100) 기판위에 RF magnetron sputtering을 이용하여 Gate insulator를 증착하고, 같은 방법으로 채널층인 a-GIZO를 70 nm 증착하였다. a-GIZO를 증착하기 위한 sputtering 조건으로는 100W의 RF power와 6 mTorr의 working pressure, 30 sccm Ar 분위기에서 증착하였다. 소스/드레인 전극은 e-beam evaporation을 이용하여 Al을 150 nm 증착하였다. 채널 폭은 80 um 이고, 채널 길이는 각각 20 um, 10 um, 5 um, 2 um이다. 마지막으로 Furnace를 이용하여 N2 분위기에서 $500^{\circ}C$로 30분간 후속 열처리를 실시한 후에, 전기적 특성을 분석하였다.

• Korean Journal of Optics and Photonics
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• v.33 no.2
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• pp.74-83
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• 2022

The entire process, from the raw material to the final system qualification test, has been developed to fabricate a large-diameter, lightweight reflective-telescope system for a satellite observation. The telescope with 3 anastigmatic mirrors has an aperture of 700 mm and a total mass of 66 kg. We baked a silicon carbide substrate body from a carbon preform using a reaction sintering method, and tested the structural and chemical properties, surface conditions, and crystal structure of the body. We developed the polishing and coating methods considering the mechanical and chemical properties of the silicon carbide (SiC) body, and we utilized a chemical-vapor-deposition method to deposit a dense SiC thin film more than 170 ㎛ thick on the mirror's surface, to preserve a highly reflective surface with excellent optical performance. After we made the SiC mirrors, we measured the wave-front error for various optical fields by assembling and aligning three mirrors and support structures. We conducted major space-environment tests for the components and final assembly by temperature-cycling tests and vibration-shock tests, in accordance with the qualifications for the space and launch environment. We confirmed that the final telescope achieves all of the target performance criteria.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.125.1-125.1
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• 2011

빛 에너지를 전기에너지로 변환하는 발전소자인 태양전지는 청정 재생 에너지원으로 최근 Si 박막 태양전지의 고 효율화를 위해 여러 기술적인 면에서 개발되어지고 있다. 현재 박막형 태양전지는 실리콘계가 주류를 이루고 있으며, 유리 혹은 유연성기판(금속 or 고분자)에 비정질 실리콘 박막을 형성시킨 태양전지와 실리콘웨이퍼의 양면에 태양전지를 형성함으로써 효율을 극대화시킨 이종접합태양전지 등이 연구되고 있다. 특히 flexible 태양전지는 hard 기판에 비해 비교적 저가인 플라스틱 필름과 금속 foil을 기판으로 이용함으로서 저가화가 용이하며, 가볍고 유연성을 갖추고 있어 휴대와 시공에 있어 매우 우수한 장점을 가지고 있다. 본 연구에서는 flexible 기판(stainless steel)을 이용하여 태양전지 내 반사막 층이 미치는 영향을 알아보기 위하여 AZO/Ag 이중구조 박막의 특성을 연구하였다. RF magnetron sputtering system을 이용하였으며, 상온에서 Ag/AZO 이중구조 박막을 제조하였다. stainless steel 기판 위에 Ag층을 25nm 두께로 증착하였으며 연속공정으로 AZO 박막을 100~500nm의 두께경사를 가지도록 성장시켰다. 이 때의 AZO/Ag 이중구조 박막의 표면 morphology는 AFM 분석결과 7nm~3nm의 값을 나타내었으며, AZO 박막의 두께가 증가할수록 rms 값이 감소하는 경향을 보여주었다. 본 발표에서는 flexible 기판 상에 성장된 AZO/Ag 이중구조 박막의 전기적, 광학적 특성 등에 관하여 추가적으로 토론한 후 태양전지 효율 중 흡수층 내 반사막 층이 미치는 역할을 알아보겠다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.6
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• pp.43-49
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• 2000

The TiN thin films were deposited by ALE(atomic layer epitaxy) on (100) silicon substrate. The TiN thin films were characterized by means of XRD, 4-point probe, AFM, AES and SEM. TEMAT(terakis(ethyl methy lamino)titanium) and $NH_3$ were injected into the reactor in sequence of TEMAT-$N_2-NH_3-N_2$ to ensure a saturated surface reaction. As a result, the depostion rate of the TiN film was controlled by self-limiting growth mechanism at temperature range form 150 to 220 $^{\circ}C$. Deposited TiN films, all of which show amorphous structure, had a fixed deposition rate of 4.5 ${\AA}$/cycle. The resistivity of 210 ~ 230 ${\mu}{\Omega}{\cdot}$cm and the surface r.m.s. roughness of 7.9 ~ 9.3 ${\AA}$ were measured. When TiN film of 2000 ${\AA}$ were deposited, a excellent step coverage were observed in a trench structure of 0.43${\mu}m$ contacts with 6:1 aspect ratio.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.105-110
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• 2008

We have proposed a new structure of poly-silicon thin film transistor(TFT) which was fabricated the LDD region using doping oxide with graded spacer by etching shape retio. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $HT_2$/plasma processes are fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring /analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si Brain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplity of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.173-173
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• 2010

$Bi_4Ti_3O_{12}$ ($B_4T_3$) is a unique ferroelectric material that has a relatively high dielectric constant, high Curie temperature, high breakdown strength, and large spontaneous polarization. As a result this material has been widely studied for many applications, including nonvolatile ferroelectric random memories, microelectronic mechanical systems, and nonlinear-optical devices. Several reports have appeared on the use of Mn dopants to improve the electrical properties of $B_4T_3$ thin films. Mn ions have frequently been used for this purpose in thin films and multilayer capacitors in situations where intrinsic oxygen vacancies are the major defects. However, no systematic study of the optical properties of $B_4T_3$ films has appeared to date. Here, we report optical data for these films, determined by spectroscopic ellipsometry (SE). We also report the effects of thermal annealing and Mn doping on the optical properties. The SE data were analyzed using a multilayer model that is consistent with the original sample structure, specifically surface roughness/$B_4T_3$ film/Pt/Ti/$SiO_2$/c-Si). The data are well described by the Tauc-Lorentz dispersion function, which can therefore be used to model the optical properties of these materials. Parameters for reconstructing the dielectric functions of these films are also reported. The SE data show that thermal annealing crystallizes $B_4T_3$ films, as confirmed by the appearance of $B_4T_3$ peaks in X-ray diffraction patterns. The bandgap of $B_4T_3$ red-shifts with increasing Mn concentration. We interpret this as evidence of the existence deep levels generated by the Mn transition-metal d states. These results will be useful in a number of contexts, including more detailed studies of the optical properties of these materials for engineering high-speed devices.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.17 no.5
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• pp.179-186
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• 2007

Single crystal $CdGa_2Se_4$ layers were grown on a thoroughly etched semi-insulating GaAs(100) substrate at $420^{\circ}C$ with the hot wall epitaxy(HWE) system by evaporating the polycrystal source of $CdGa_2Se_4$ at $630^{\circ}C$. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction(DCXD). The carrier density and mobility of single crystal $CdGa_2Se_4$ thin films measured with Hall effect by van der Pauw method are $8.27{\times}10^{17}cm^{-3},\;345cm^2/V{\cdot}s$ at 293 K, respectively. The photocurrent and the absorption spectra of $CdGa_2Se_4/SI$(Semi-Insulated) GaAs(100) are measured ranging from 293 K to 10 K. The temperature dependence of the energy band gap of the $CdGa_2Se_4$ obtained from the absorption spectra was well described by the Varshni's relation $E_g(T)=2.6400eV-(7.721{\times}10^{-4}eV/K)T^2/(T+399K)$. Using the photocurrent spectra and the Hopfield quasicubic model, the crystal field energy(${\Delta}cr$) and the spin-orbit splitting energy(${\Delta}so$) far the valence band of the $CdGa_2Se_4$ have been estimated to be 106.5 meV and 418.9 meV at 10 K, respectively. The three photocurrent peaks observed at 10 K are ascribed to the $A_{1^-},\;B_{1^-},\;and\;C_{11}-exciton$ peaks.