• 반도체디스플레이기술학회지
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• 제10권2호
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• pp.73-81
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• 2011

We manufactured the inkjet printing system for the application into the nano Ag finger line interconnection process in Si solar cells. The home-made inkjet printer consists of motion part for XY motion stage with optical table, head part, power and control part in the rack box with pump, and ink supply part for the connection of pump-tube-sub ink tanknozzle. The ink jet printing system has been used to conduct the interconnection process of finger lines on Si solar cell. The nano ink includes the 50 nm-diameter. Ag nano particles and the viscosity is 14.4 cP at $22^{\circ}C$. After processing of inkjet printing on the finger lines of Si solar cell, the nano particles were measured by scanning electron microscope. After the heat treatment at $850^{\circ}C$, the finger lines showed the smooth surface morphology without micropores.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2003년도 추계학술대회 발표 논문집
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• pp.105-108
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• 2003

본 논문은 파이렉스 #7740 유리박막을 이용한 MEMS용 MLCA와 Si기판의 양극접합 특성에 관한 것이다. 최적의 RF 마그네트론 스퍼터링 조건(Ar 100 %, input power $1W/\textrm{cm}^2$)하에서 MLCA 기판위에 파이렉스 #7740 유리의 특성을 갖는 박막을 증착한 후 600 V, $400^{\circ}C$에서 1시간동안 양극접합했다. 그 다음에 Si 다이어프램을 제조한 후, MLCA/Si 접합계면과 MLCA 구동을 통한 Si 다이어프램 변위특성을 분석 및 평가하였다. 다이어프램 형상에 따라 정밀한 변위 제어가 가능했으며 0.05-0.08 %FS의 우수한 선형성을 나타내었다. 또한, 측정동안 접합계면 균열이나 계면분리가 일어나지 않았다. 따라서, MLCA/Si기판 양극접합기술은 고성능 압전 MEMS 소자 제작공정에 유용하게 사용가능할 것이다.

• 반도체디스플레이기술학회지
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• 제6권3호
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• pp.41-45
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• 2007

The (SrCa)$TiO_3$(SCT) thin films were deposited on Pt-coated electrode(Pt/TiN/$SiO_2$/Si) using RF sputtering method according to the deposition condition. The crystallinity of SCT thin films were increased with increase of deposition temperature in the temperature range of $100{\sim}500[^{\circ}C]$. The optimum conditions of RF power and Ar/$O_2$ ratio were 140[W] and 80/20, respectively. Deposition rate of SCT thin films was about $18.75[{\AA}/min]$ at the optimum condition. The composition of SCT thin films deposited on Si substrate is close to stoichiometry (1.081 in A/B ratio). The maximum dielectric constant of SCT thin film was obtained by annealing at $600[^{\circ}C]$.

• 전기전자학회논문지
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• 제26권4호
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• pp.671-680
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• 2022

본 논문에서는 현재 출시되어 있는 전기차의 구동모터 사양을 대부분 포괄하는 200kW급 구동용 모터드라이버를 개발하였다. 고효율ㆍ고전력밀도를 달성하기 위해 기존 전력반도체(Insulated-gate bipolar transistor, IGBT)대신에 차세대 전력반도체(Silicon carbide, SiC)를 적용하였으며 SiC를 최적사용하기 위해 하드웨어에 대한 분석을 통해, 예상되는 효율 및 방열특성을 구하여 최적 설계를 하였다. 전기차 구동모터에 대부분 활용되는 매입형 영구자석 동기모터(Interior permanent-magnet synchronous machine, IPMSM)를 위한 벡터 제어 알고리즘을 DSP를 활용하여 구현하였다. 본 논문에서는 SiC기반 전기차 구동용 모터드라이버 시작품을 설계ㆍ제작하였으며 실험을 통해 성능을 검증하였다.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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• pp.89-92
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• 2005

The AIN/AI thin films were prepared at various conditions, such as $N_2$ gas flow rate [$N_2(N_2+Ar)$] from 0.6 to 0.9, a substrate temperature ranging from room temperature to $300^{\circ}C$ and working pressure 1mTorr. We estimated crystallographic characteristics and c-axis preferred orientations of AIN/AI thin films as function of AI electrode surface roughness. The optimal processing conditions for AI electrode were found at substrate temperature of $300^{\circ}C$ sputtering power of 100W and a working pressure of 2mTorr. In these conditions, we obtained the c-axis preferred orientation of $AIN/AI/SiO_2/Si$ thin film about 4 degree.

• 한국전자파학회논문지
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• 제12권6호
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• pp.890-898
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• 2001

Modified Materka-Kacprzak 대신호 MESFET(Metal Semiconductor Field Effect Transistor) model을 사용하여 4H-SiC MESFET의 대신호 모델링을 수행하였다. Silvaco사의 소자 시뮬레이터인 ATLAS를 사용하여 4H-SiC MESFET 소자 시뮬레이션을 수행하고, 이 결과를 modified Materka 대신호 모델을 사용하여 모델링 하였다. 시뮬레이션 및 모델링 결과는 -8 V의 pinch off 전압과 $V_{GS}$ =0 V, $V_{DS}$ =25 V에서 $I_{DSS}$270 mA/mm, $G_{m}$ =52.8 ms/mm를 얻을 수 있었고, 전력 특성 시뮬레이션을 통해 2GHz, $V_{GS}$ =-4V, $V_{DS}$ =25 V에서 10dB의 Gain과 34dBm(1 dB compression point)의 출력전력, 7.6W/mm의 전력밀도, 37%의 PAE(power added efficiency)를 얻을 수 있었다.다.

• 한국전기전자재료학회논문지
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• 제26권4호
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• pp.271-274
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• 2013

Power Metal Oxide Semiconductor Field Effect Transistor's (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an "ideal switch". The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was $3{\mu}m$ and P base dose was $1e15cm^2$. Also the numerical multiple $2.52cm^2$ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from $1,150^{\circ}C$ to $1,200^{\circ}C$. And then $1,150^{\circ}C$ diffusion time was best condition for break down voltage.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• 전기전자학회논문지
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• 제22권4호
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• pp.1202-1205
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• 2018

본 논문에서는 4H-SiC물질 기반으로 제작된 ggNMOS를 제안하고 전기적 특성을 분석하였다. 4H-SiC는 Wide Band-gap 물질로 Si 물질 보다 면적대비 특성과 고전압 특성이 뛰어나 전력반도체 분야에 주목받고 있다. 제안된 소자는 높은 감내 특성과 Strong snapback 특성을 가진다. 공정은 SiC 공정으로 이루어 졌으며 TLP 측정 장비를 통해 전기적 특성을 분석하였다.

• 반도체디스플레이기술학회지
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• 제8권3호
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• pp.13-17
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• 2009

we have studied characterization of microbolometer based on the co-sputtered silicon-antimony ($Si_{1-x}Sb_x$) thin film for infrared microbolometer. We have investigated the resistivity and the temperature coefficient of resistance (TCR) with annealing. We deposited the films using co-sputtering method at $200^{\circ}C$ in the Ar environment. The Sb concentration has been adjusted by applying variable DC power from Sb targets. TCR of deposited $Si_{1-x}Sb_x$ films have been measured the range of -2.3~-2.8%/K. The resistivity of the film is low but TCR is higher than the other bolometer materials. Resistivity of the films has not been affected hugely according to the low annealing temperature however the resistivity has been dramatically decreased over $250^{\circ}C$. It is caused of a phase change due to the rearrangement of Si and Sb atoms during crystallization process of the films.