• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.1
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• pp.15-19
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• 2001

Current leakage is the major failure mode of semiconductor device characteristic failures. Conventionally, failures such as short circuit breaks and gate breakdowns have been analyzed and the detected causes have been reflected in the fabrication process. By using a wafer-level emission-leakage failure analysis method (in-line QC), we analyzed leakage mode failure, which is the major failure detected during the probe inspection process for LSIs, typically DRAMs and CMOS logic LSIs. We have thus developed a new technique that copes with the critical structural failures and random failures that directly affect probe yields.

• Proceedings of the Korea Institute of Fire Science and Engineering Conference
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• 2007.11a
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• pp.205-210
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• 2007

This study on the prevention of electric fire. Generally the electric fire is caused by break or disconnection of the power line, short circuit and poor contact, arcing fault ect. In these causes, this paper is studied on the detection of poor contact and arcing fault. The arcing fault is caused by poor contact mainly. The arcing fault can occurs a electric fire by interaction of flammable gas and materials and it can be caused of tracking and carbonization. These phenomenons is also caused of electric fire. Therefore this paper is studied on the detection of arcing fault and poor contact.

• Journal of Power Electronics
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• v.9 no.6
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• pp.835-844
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• 2009

In this paper a new buck-boost type DC-DC converter is presented. Its voltage gain is positive, all active elements operate under soft-switching condition independent of loading, magnetic isolation and self output short-circuit protection exist, and very fast dynamic operation is achievable by a simple bang-bang controller. This converter also exhibits appropriate PFC characteristics since its input current is inherently proportional to the source voltage. When the voltage source is off-line, it is sufficient to add an inductor after the rectifier, then near unity power factor is achievable. All essential guidelines to design the converter as a DC-DC and a PFC regulator are presented. Simulation and experimental results verify the developed theoretical analysis.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.64-65
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• 2006

This paper presents a user-friendly application for stochastic assessment of voltage sag and effective visualization for analysis data. This developed tool provides basic functions for voltage sag assessment such as load flow analysis, short circuit analysis and vulnerability analysis. Particularly it has the ability to edit one-line diagram of power system and to visualize analysis results effectively using computer graphic and animation. In order to give the real sense, analysis results are displayed with geographical information in an intuitive and rapid manner.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.5-6
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• 2006

There are typically applied on both rear and front sides of electrical contacts to the solar cell. The front contact formation is particularly sensitive to many parameters. Accordingly patterning of front grid line is an important factor of solar cells. This paper describe the electrical conversion efficiency, inclusive of shading loss that gives various spacing between front metal grid lines. In experiments with variation of spacing. It was verified that the wide spacing of grid fingers could increase the series resistance, also the narrow spacing of grid fingers also implies a grid with a higher density of grid fingers. The sunlight of incidence was more of reflection by grid fingers. In result, the short circuit current, which contribute to conversion efficiency was decreased, because maximum power input was reduced and increase the series resistance.

• 전기의세계
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• v.13 no.1
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• pp.1-5
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• 1964

철심형 동기발전기를 무부하로 운전하는 중 1상중성점간에 단락사고가 돌발한 경우에 그 단락상의 전기자전류와 계자전류를 표시하는 식을 구하여 본다. 식(12)의 단락전류 $i_{L-N}$을 단수형으로 전개해서 기수배조파와 우수배조파로 분리해서 검토를 하고 계자전류 I는 곧 I=E+2/3( $x_{d}$-x'$_{x}$) $i_{L-N}$cos .theta.의 관계식에서 일단 단락전류 $i_{L-N}$가 구해졌으므로 단지 대입하므로써 간단히 얻어진다. 식(12)와 (17)을 도시하는데 필요한 동기기정수를 $x_{d}$=0.78, $x_{q}$ =0.48, x'$_{d}$=0.21, r=0.03, $T_{0}$=163 및 E=1의 perunit치로 가정한다.it치로 가정한다.

• Proceedings of the KSR Conference
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• 2005.05a
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• pp.767-775
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• 2005

Power Supply System for electric railways is diversified with technical development and is required high technologies. especially, recently there is required many research and development for earthing to ensure safety of people and protection of installations. Generally, leakage resistance is high between rail and ground at tunnel section of subway. because of short circuit of feeding line, earthing interference by transient overvoltage between signals and communication system, and insulation failure, it can damage to human and equipments To minimize these obstacles, earthing equipment is installed at underground section of railway, but it brings about problems in accordance with operate each earthing system to be not enough required protection provisions for electrified railways. This paper proposes effective earthing method to be concerned about installation cost and maintenance. The validity of the proposed earth method is verified by simulation results at underground section of railways.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2335-2338
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• 2003

This paper presents a real-time PCB (Printed Circuit Board) vision inspection system. This system can detect the OPEN and SHORT of the PCB which of the line width is 150$\mu\textrm{m}$. Our PCB inspection system is based on the referential method. Since the size of the captured PCB image is very large, the image is divided into 512${\times}$512 images to apply the accurate alignment efficiently. To correct the misalignment between the reference image and the inspection image, pattern matching is performed. In order to implement the proposed algorithm in real-time, we use the SIMD instruction and the double buffering structures. Our experiential results show the effectiveness of the developed inspection algorithm.

• Journal of electromagnetic engineering and science
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• v.17 no.4
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• pp.197-201
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• 2017

In this paper, we present a novel design for a dual-band bandpass filter (BPF) based on the conventional second-order, open-loop BPF. By adding series resonant circuits to the open ends of the resonator, we can create two resonant modes from the even and odd modes. One pair of the even and odd modes constitutes the upper passband, while the other pair constitutes the lower passband. By adding another series resonant circuit to the open-loop resonator, we can control the bandwidth of either the upper passband or the lower passband. We can replace the series resonant circuits with simple microstrip line resonators. A dual-band BPF working at both Wi-Fi bands (2.4 GHz and 5.8 GHz bands) is designed based on the proposed method and is tested. The measured and simulated results show excellent agreement.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.265-269
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• 1994

The switching dead time avoiding a bridge leg short circuit in PWM voltage source inverter produces distortions of the controlling inverter output performance such as current waveform, voltage vector, and torque. In this paper, the influence of dead time is investigated. The on-line space voltage vector modulation method is used for current controller. It is possible to compensate dead time by space voltage vector modulation which generates additional pulse compensating voltage distortion caused by dead time. In addition, narrow pulse which is generally neglected can be compensated. All the algorithms, including field-oriented control are performed by one chip microprocessor 80C196MC and DSP TMS320C31. Experimental results probe that the proposed scheme provides a good inverter output performance.