• Proceedings of the KWS Conference
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• 1998.05a
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• pp.176-179
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• 1998

• Journal of information and communication convergence engineering
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• v.7 no.1
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• pp.62-65
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• 2009

In this paper, the temperature characteristics of full CMOS FLL(frequency locked loop) re analyzed. The FLL circuit is used to generate an output signal that tracks an input efference signal. The locking time of FLL is short compared to PLL(phase locked loop) circuit because the output signal of FLL is synchronized only in frequency. Also the FLL s designed to allow the circuit to be fully integrated. The FLL circuit is composed two VCs, two buffers, a VCO and two frequency dividers. The temperature variation of frequency divider, FVC and buffer cancelled because the circuit structure. is the same and he temperature effect is cancelled by the comparator. Simulation results are shown to illustrate the performance of the designed FLL circuit with temperature.

• Proceedings of the KWS Conference
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• 2006.10a
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• pp.136-138
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• 2006

Recently a lots of problems have observed in high densified and high integrated electronic components. One of them is ion migration phenomena, which induce the electrical short of electrical circuit. Ion migration phenomena has been observed in the field of exposing the specific environment and using for a long time. Also as the RoHS restriction was started in July 1st, 2006, Pb-free solder was utilized in electronics assemblies. In this case, it is very important to compatible between components and printed circuit board(PCB), thus surface treatment materials of PCB was changed to Sn, Sn-3.0Ag-0.5Cu, Cu. Therefore these new application become to need to reevaluate the sensitivity about electrochemical ion migration. This study was evaluated the occurrence time of electrochemical ion migration using by water drop test. We utilized PCB(printed circuit board) having a comb pattern as follows 0.1, 0.318, 0.5, 1.0 mm pattern distance. Sn-3.0Ag-0.5Cu and Sn-37Pb were electroplated on the comb pattern. 6.5V and 15.0V were applied in the comb pattern and then we measured the electrical short time causing by occurring the ion migration. In these results, we evaluate the sensitivity and derived the prediction models of ion migration occurrence time depending on the pattern materials, applied voltage and pattern spacing of PCB conductor.

• Progress in Superconductivity and Cryogenics
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• v.7 no.4
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• pp.28-31
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• 2005

To verify the feasibility of bifilar winding type superconducting fault current limiter (SFCL) using BSCCO tape, two types of magnets were fabricated and tested by short-circuit in this research. Even if the FCL using high Tc superconducting (HTS) tape has zero resistance in normal state, it needs to be wound as a bifilar winding for zero inductance. Solenoid type and pancake type bifilar winding magnets are designed and fabricated with the same length of BSCCO tape. The test system consists of AC power supply, transformer, fault switch, load and bifilar winding magnet. The applied AC voltages during fault duration, 0.1s, were from 0.5V to 20V. The test results without bifilar winding magnet were compared with those with each type magnets. The test results include voltage against magnet, transport current and generated resistance curve. Thermal stability, the recovery time, was studied from the results of two type magnets. The pancake type was the most effective to limit fault current but the solenoid type was thermally the most stable. From this research, short-circuit characteristics of the two types were obtained.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.11
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• pp.96-104
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• 2000

This paper presents a simple method to estimate short-circuit power dissipation for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution. The proposed analytical expressions can be easily applied in such applications as power estimation even when the current expression is changed.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.53 no.1
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• pp.47-54
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• 2004

A new high voltage DC power supply is proposed. The proposed power supply is constructed with several power converters connected in series. It is easy to obtain high DC voltage for the same structure of each power converter. The output DC power of the proposed power supply can be disconnected from the load within several hundred microseconds at the instant of a load short-circuit fault. The rising time of the output DC voltage is also as small as several hundred microseconds, and there is no overshoot of the voltage because all of the output filter capacitors keep undischarged state even in load short-circuit condition. Therefore, the proposed scheme is suitable for the protection of frequent output short-circuit and fast on/off switching of output DC voltage. The proposed power supply has improved features such as simple structure, high power factor, and reduced size and volume compared with the conventional schemes. The operating principle is described and the validity of the proposed scheme is proved through simulations and experiments.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.8
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• pp.106-113
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• 2011

The conventional grounding impedance of a counterpoise is calculated as a function of the length of the counterpoise by use of the distributed parameter circuit model with an application of the EMTP(Electromagnetic Transient Program). The adequacy of the distributed parameter circuit model is examined and verified by comparison of the simulated and the measured results. The conventional grounding impedance of the counterpoise is analyzed for the first short stroke and subsequent short stroke currents. As a result, the simulated results show that the minimum conventional grounding impedance gives at a specified length of the counterpoise. The shorter the time taken to reach the peak of injected currents, the shorter the length of the counterpoise having the minimum conventional grounding impedance. We also present the critical lengths of the counterpoise for short stroke currents as a function of soil resistivity. Based on these results, it is necessary to compute the length of the counterpoise in a specified soil resistivity which satisfies both the low conventional grounding impedance requirement whilst also providing a suitable ground resistance in order to obtain an economical design and installation of the counterpoise.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.24 no.4
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• pp.306-314
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• 2012

Several numerical or analytical models have been proposed to analyze the thermal response of vertical ground heat exchangers (GHEX). However, most models are valid only after several hours of operation since they neglect the heat capacity of the borehole. Recently, the short time response of the GHEX became important in system simulation to improve efficiency. In this paper, a simple new method to evaluate the short time response of the GHEX by using an analogy model of electric circuit transient analysis was presented. The new transient heat exchanger model adopting the concept of thermal capacitance of the borehole as well as the steady-state thermal resistance showed the transient thermal resistance of the borehole. The model was validated by in-situ thermal response test and then compared with the DST model of the TRNSYS program.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.7
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• pp.1261-1267
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• 2007

Although LEDs have been used in various applications with improving the brightness and luminous efficacy, the electrical and optical characteristics of high power LED varies at different temperature and starting time. In this paper, optimal heat sink and apparatus design were conducted using IR camera and ICEPAK on the LED bulb consisting with fourteen LED array. The temperatures of heat sink and LED device of the designed LED bulb without cooling pan were $74^{\circ}C\;and\;96.8^{\circ}C$, respectively, showing in good themal characteristics. For high efficiency driving circuit of LED array adopted optimal heat sink design, driving circuits of constant voltage and current circuits were suggested and fabricated. As a result the efficacy of all driving circuits showed more than 20 lm/W. Also, the constant current circuits are suitable for signal lamp, hallway lamp, and flash lamp having short operating time(about 30 min). On the other hand, a reading light and indoor lamp having long operating time can be controlled by constant voltage circuit.

• Journal of the Semiconductor & Display Technology
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• v.21 no.1
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• pp.50-55
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• 2022

Due to the wavelength shift problem of micro LED caused by the change of current density, the active matrix driving pixel circuit that is used in OLED cannot be applied to micro LED displays. Therefore, we need a gray scale method based on modulation of duration time of light emission. In this study, we propose the PWM-controlled micro LED pixel circuit based on CMOS thin film transistors (TFTs). By adopting CMOS inverter structure, we can reduce the number of storage capacitors from the circuit and make the operating speed of the circuit faster. Most of all, our circuit is designed to make operating speed of PWM circuit faster by adopting feedback effect through double gate TFT structure. As a result, it takes about 4.7ns to turn on the LED and about 5.6ns to turn it off. This operating time is short enough to avoid the color distortion and help the precise control of the gray scale.