• Journal of the Korean Society for Precision Engineering
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• v.27 no.1
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• pp.11-17
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• 2010

This study investigates the non-traditional manufacturing process of dry wire electrical discharge machining (EDM) in which liquid dielectric is replaced by a gaseous medium. Wire EDM experiments of thin workpieces were conducted both in wet and dry EDM conditions to examine the effects of spark cycle (T), spark on-time ($T_{on}$), thickness of work pieces, and work material on machining performance. The material removal rate (MRR) in the dry wire EDM case was much lower than that in the wet wire EDM case. In addition, the thickness of workpiece and work-material were found to be critical factors influencing the MRR for dry EDM process. The relative ratios of spark, arc and short circuit were also calculated and compared to examine the effectiveness of processes of dry and wet wire EDM.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.8
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• pp.1547-1554
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• 2011

As process parameters scale, interconnect width are reduced rapidly while the current flowing through interconnects does not decrease in a proportional manner. This effect increases current density in metal interconnects which may result in poor reliability. Since RMS(root-mean-square) current limits are used to evaluate self-heating and short-time stress failures caused by high-current pluses, RMS current estimation is very important to guarantee the reliability of semiconductor systems. Hence, it is critical to estimate the current limits through interconnects earlier in semiconductor design stages. The purpose of this paper is to propose a fast, yet accurate RMS current estimation technique that can offer a relatively precise estimate by using closed-form equations. The efficiency and accuracy of the proposed method have been verified through simulations using HSPICE for a vast range of interconnect parameters.

• Proceedings of the KIEE Conference
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• 2003.10a
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• pp.242-245
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• 2003

A garter spring, which is a long, special, close-coiled extension spring with its ends joined to form a ring, is used in tulip contactor between vacuum circuit breaker and bus bar in switchgear. To carry short-time current and resist welding at the contact surface in the tulip contactor, the garter spring must transmits an uniform contact force to the contact surface through the contact chips arranged in the circumference of bus bar. In this paper, the system for measurement of the contact force by the garter spring is developed. Using the developed measurement system, the design of the connection structure including the garter spring is reviewed to obtain the uniform contact forces in all of contact chips.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.319-320
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• 2006

At this study, one of the electrical problems, arc characteristics according to loss of contact between a pantograph and a catenary, was analyzed. A characteristic of arc current is disappeared in a short period of time. Nevertheless, it has large current same as a surge, so that it has EMI/EMC problems. In the case of the electrical railway system, there is oscillation and de-wiring. The are current is generated by these problems. The result of this study can be used as a facility design to prevent a surge and needs to prove through actual field data in the main circuit of an electric train for a precise analysis about effect of are.

• Proceedings of the KIEE Conference
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• 2007.04c
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• pp.103-106
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• 2007

This paper presents single-phase SRM drive system with single-stage high power factor and low torque ripple. Single-phase SRM has simple mechanical and electrical structure, robust and high speed operation characteristic. But conventional SRM drive with diode bridge rectifier and filter capacitor has a low power factor because of short charge time of capacitor. Therefore, this paper presents a novel single-phase SRM drive with single-stage structure circuit, which can improve the power factor and reduce peak torque ripple. A novel switching topology is presented base on mathematical analysis. The novel drive method is verified by simulations and experiments.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1272-1280
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• 2014

This paper presents solutions for fault detection and diagnosis of two-level, three phase voltage-source inverter (VSI) topologies with IGBT devices. The proposed solutions combine redundant standby VSI structures and contactors (or relays) to improve the fault-tolerant capabilities of power electronics in applications with safety requirements. The suitable combination of these elements gives the inverter the ability to maintain energy processing in the occurrence of several failure modes, including short-circuit in IGBT devices, thus extending its reliability and availability. A survey of previously developed fault-tolerant VSI structures and several aspects of failure modes, detection and isolation mechanisms within VSI is first discussed. Hardware solutions for the protection of power semiconductors with fault detection and diagnosis mechanisms are then proposed to provide conditions to isolate and replace damaged power devices (or branches) in real time. Experimental results from a prototype are included to validate the proposed solutions.

• Journal of Industrial Technology
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• v.28 no.B
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• pp.167-174
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• 2008

In this paper, the analysis on type effect of inverter output voltage distortion on the control of an induction motor is discussed. The inverter output voltage is distorted differently from the reference voltage owing to the inverter nonlinear characteristic. The inverter nonlinear characteristic results from the voltage drop, the inherent characteristic of the power semiconductor, and the dead time for preventing the short circuit of the inverter leg. This characteristic distorts the inverter output voltage and then, causes the motor flux estimation error. Although this characteristics do not significantly effect in the general-purpose induction motor control, but significantly effect on the low-speed operation of high performance motor control such as the sensorless vector control.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.25 no.6
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• pp.406-413
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• 2015

The piezoelectric coupling in piezoelectric vibration energy harvesters with load resistance induces electrical damping as well as increase in the system stiffness. Starting from analytically deriving the explicit relations through governing equations in the frequency domain, this work identifies the characteristics of the electrically induced damping mechanism and shows that the electrically induced damping serves as a structural hysteretic damping on condition that a piezoelectric vibration energy harvester is excited at its short-circuit resonant frequency and its load resistor is optimally impedance- matched at the same time. Finally, it is analytically verified that the equivalence of a mechanical and an electrically induced damping ratio is required for the maximum power generation at a load resistor, which was claimed in some literature.

• Proceedings of the KSR Conference
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• 2007.05a
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• pp.829-835
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• 2007

For constant operation, Electric Railway System has many electrically divided parts of the trolley lines to avoid error spreading. FRP-Section have a role to divide Catenary trolley lines electrically. If one electric train approach to the section at the same time with partial power failure, the pantograph of train can make a short circuit with supplied part to failure part. Electric arc induced with this switching effect, can break FRP-section, and there are such error cases. In this study, we propose one method to prevent FRP-section breakdown from these reason, with detecting sensor at the sectional position.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.75-80
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• 1994

AlAs/GaAs/AlAs RTDs(Resonant Tunneling Diodes) are fabricated and current-voltage properties of them are measured. At room temperature, peak to valley ratio is 2.4 NOT.AND.OR logic gates and Flip-Flop are fabricated using the bistable characteristics of RTDs. Although NOT.AND.OR logic gates need 5~8 transistors. only one RTD is sufficient to fabricate the logic gates. Since the switching time is very short(<10$^12$sec), it is possible to drive the semiconductor circuits fast and integrate them very large. And it is convinced the possibility of integrating RTDs to multilevel logic circuits by observing two peaks of similar current in the serial connection of two RTDs.