• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.2
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• pp.253-259
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• 2016

This paper introduces a new variable power divider circuit with an arbitrary power division ratio ranging from $1:{\infty}$ to ${\infty}:1$. The proposed power divider circuit consists of one branch-line coupler to be a good input matching characteristic, two variable phase shifters with 90-degree phase variation to be connected two output paths of the branch-line coupler, and one ring-hybrid coupler to combine output signals of two variable phase shifter. The power division ratio between the two output ports of the proposed power divider can be easily controlled by the phase variation of the two phase shifter. The proposed power divider circuit fabricates on laminated RF-35 (h = 20 mil, er=3.5; Taconic) with a center frequency of 2 GHz. The power division ratio of the fabricated prototype varies from about 1:1000 to 5000000:1, with an input reflection characteristic(S11) of below -20 dB, an insertion loss of about -1.0 dB, and an isolation characteristic of below -17 dB between two output ports in the range 1.9-2.1 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.613-623
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• 2012

In this paper, we present an ultra miniaturized voltage tuned oscillator, with HMIC-type amplifier and phase shifter, using LTCC artificial dielectric resonator. ADR which consists of periodic conductor patterns and stacked layers has a smaller size than a dielectric resonator. The design specification of ADR is obtained from the design goal of oscillator. The structure of the ADR with a stacked circular disk type is chosen. The resonance characteristic, physical dimension and stack number are analyzed. For miniaturization of ADRO, the ADR is internally implemented at the upper part of the LTCC substrate and the other circuits, which are amplifier and phase shifter are integrated at the bottom side respectively. The fabricated ADRO has ultra small size of $13{\times}13{\times}3mm^3$ and is a SMT type. The designed ADRO satisfies the open-loop oscillation condition at the design frequency. As a results, the oscillation frequency range is 2.025~2.108 GHz at a tuning voltage of 0~5 V. The phase noise is $-109{\pm}4$ dBc/Hz at 100 kHz offset frequency and the power is $6.8{\pm}0.2$ dBm. The power frequency tuning normalized figure of merit is -30.88 dB.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.15 no.2
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• pp.111-118
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• 2016

This paper presents an X-band (9.375 GHz) $1{\times}2$ array microstrip antenna which is capable of active beam compensation for installation of an unmanned aerial vehicle (UAV). First of all, a basic $1{\times}2$ array microstrip antenna incorporated with wilkinson power divider was designed and performance of the array antenna was verified. Next, to verify beam steering performance of the designed array microstrip antenna, we fabricated a phase shifter, and the wilkinson power divider as module structure and measured characteristics of beam steering according to phase shifting. The main lobe is 0.6 dBi at $0^{\circ}$, and the side lobe decreased 18.8 dB. The reliable radiation pattern was achieved. Finally, an active beam steering microstrip array antenna attached with the phase shifter and the power divider on the back side of the antenna was designed and fabricated to install wing of UAV for compactness. The maximum gain is 0.1 dBi. Therefore, we obtained a basic antenna technology for compensating beam error according to wing deformation of an UAV installed array antennas.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.891-901
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• 2003

This paper presents low-power asynchronous barrel shifters for variable length encoders and decoders useful in portable applications using multimedia standards. Our approach is to create multi-level asynchronous barrel shifters optimized for the skewed shift control statistics often found in these codecs. For common shifts, data passes through one level, whereas for rare shifts, data passes though multiple levels. We compare our optimized designs with the straightforward asynchronous and synchronous designs. Both pre- and Post-layout HSPICE simulation results indicate that, compared to their synchronous counterparts, our designs provide over a 40% savings in average energy consumption for a given average performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.810-819
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• 2007

The I/Q unbalance which is generated by non-ideal components such as a $90^{\circ}$ phase shifter and I/Q filters is an inevitable physical phenomenon and leads to performance degradation when we implement a coherent two-dimensional (2-D) modulation/demodulation system. This paper provides an exact and general expression for the SEP(symbol error probability) of DVB-S2 system with I/Q phase and amplitude unbalance over AWGN channel. Coordinate rotation and shift techniques used to redefine a received signal are key mathematical tools. In conclusion, the derived result is expressed as a linear combination of the 2-D Gaussian Q-functions.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1275-1277
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• 1995

We designed and constructed an extremly high power s-band traveling wave resonator for the test of high power microwave components using 80MW pulsed klystron with $4{\mu}s$ pulse width. The 10dB directional coupler for the input power coupling was used, and the ring consists of phase shifter, tuner, H-band, and other microwave components. The designed total electrical length of the system is 10 times of the waveguide wavelength, ${\lambda}_g$=15.3cm, and the measured total insertion loss is 0.15dB. The low power test measurment showed the power multiplication of 14.69. The design goal is to achieve the peak power of 300MW, pulse width $4{\mu}s$ with 30 pulse repetition rate. In this article we discuss the treveling wave resonant ring constructed at the PAL laboratory together with the test results.

• Journal of international Conference on Electrical Machines and Systems
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• v.3 no.2
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• pp.132-138
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• 2014

We investigated the harmonic voltages generated by a synchronous machine adding d-axis and q-axis harmonic field windings to reduce the harmonics in a power line. First, electronic circuits such as a frequency multiplier, band-pass filter, and phase shifter were newly designed and made to carry out the experiment. Next, an experimental circuit, for which an AC voltage of frequency 6f synchronized to the power line voltage of frequency f could be obtained, was constructed to examine the generation of harmonic voltage in more detail. Finally, an experiment involving the generation of harmonic voltage was performed using an experimental synchronous generator with harmonic windings in the d-axis and q-axis. In this paper, the power spectrum and the waveforms of the harmonic voltages in the armature winding are presented. Moreover, the values calculated from theoretical expressions of harmonic voltages in armature winding are compared with the values obtained by the experiment.

• ETRI Journal
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• v.35 no.3
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• pp.378-385
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• 2013

An S-band multifunction chip with a simple interface for an active phased array base station antenna for next-generation mobile communications is designed and fabricated using commercial 0.5-${\mu}m$ GaAs pHEMT technology. To reduce the cost of the module assembly and to reduce the number of chip interfaces for a compact transmit/receive module, a digital serial-to-parallel converter and an active bias circuit are integrated into the designed chip. The chip can be controlled and driven using only five interfaces. With 6-bit phase shifting and 6-bit attenuation, it provides a wideband performance employing a shunt-feedback technique for amplifiers. With a compact size of 16 $mm^2$ ($4mm{\times}4mm$), the proposed chip exhibits a gain of 26 dB, a P1dB of 12 dBm, and a noise figure of 3.5 dB over a wide frequency range of 1.8 GHz to 3.2 GHz.

• Journal of Advanced Marine Engineering and Technology
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• v.39 no.6
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• pp.599-603
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• 2015

To strengthen the existing regulations with respect to carbon emissions in the marine industry, there has been an increase in the number of studies focusing on realizing improvements in the utilization of vessels. While the development of new techniques related to these improvements can be costly, in this paper, we discuss a cost-effective method that may be applied directly to existing ships. The experimental data obtained suggests that the greatest reduction in energy loses can be realized by installing a double-partition wall on the storage tank of the ship, among other methods.

• Journal of the Korea Society of Computer and Information
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• v.9 no.1
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• pp.9-15
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• 2004

New WSW(Wrap Side Wall) is proposed to decrease junction electric field in this paper. WSW process is fabricated after first gate etch, followed NM1 ion implantation and deposition & etch nitride layer. New WSW structure has buffer layer to decrease electric field. Also we compared the hot carrier characteristics of WSW and conventional. Also, we design a test pattern including pulse generator, level shifter and frequency divider, so that we can evaluate AC hot carrier degradation on-chip. It came to light that the universality of the hot carrier degradation between DC and AC stress condition exists, which indicates that the device degradation comes from the same physical mechanism for both AC and DC stress. From this universality, AC lifetime under circuit operation condition can be estimated from DC hot carrier degradation characteristics.