• Transactions on Electrical and Electronic Materials
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• v.17 no.2
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• pp.57-68
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• 2016

In this study, we present the modern hybrid system based power generation for electric vehicle applications. We describe the hybrid structure of modified current source based DC - DC converters used to extract the maximum power from Photovoltaic (PV) and Fuel Cell system. Due to reduced dc-link capacitor requirement and higher reliability, the current source inverters (CSI) better compared to the voltage source based inverter. The novel control strategy includes Distributed Maximum Power Point Tracking (DMPPT) for photovoltaic (PV) and fuel cell power generation system. The proposed DC - DC converters have been analyzed in both buck and boost mode of operation under duty cycle 0.5>d, 0.5<d<1 and 0.5<d for capable electric vehicle applications. The proposed topology benefits include one common DC-AC inverter that interposes the generated power to supply the charge for the sharing of load in a system of hybrid supply with photovoltaic panels and fuel cell PEM. An improved control of Direct Torque and Flux Control (DTFC) based induction motor fed by current source converters for electric vehicle.In order to achieve better performance in terms of speed, power and miles per gallon for the expert, to accepting high regenerative braking current as well as persistent high dynamics driving performance is required. A simulation model for the hybrid power generation system based electric vehicle has been developed by using MATLAB/Simulink. The Direct Torque and Flux Control (DTFC) is planned using Xilinx ISE software tool in addition to a Modelsim 6.3 software tool that is used for simulation purposes. The FPGA based pulse generation is used to control the induction motor for electric vehicle applications. FPGA has been implemented, in order to verify the minimal error between the simulation results of MATLAB/Simulink and experimental results.

• Journal of Power Electronics
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• v.10 no.1
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• pp.9-13
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• 2010

This paper proposes an input-series-output-parallel connected ZVS full bridge converter with interleaved control for photovoltaic power conditioning systems (PV PCS). The input-series connection enables a fully modular power-system architecture, where low voltage and standard power modules can be connected in any combination at the input and/or at the output, to realize any given specifications. Further, the input-series connection enables the use of low-voltage MOSFETs that are optimized for a very low RDSON, thus, resulting in lower conduction losses. The system costs decrease due to the reduced current, and the volumes of the output filters due to the interleaving technique. A topology for a photovoltaic (PV) dc/dc converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing the PV module characteristics is proposed. The control scheme, consisting of an output voltage loop, a current loop and input voltage balancing loops, is proposed to achieve input voltage sharing and output current sharing. The total PV system is implemented for a 10-kW PV power conditioning system (PCS). This system has a dc/dc converter with a 3.6-kW power rating. It is only one-third of the total PV PCS power. A 3.6-kW prototype PV dc/dc converter is introduced to experimentally verify the proposed topology. In addition, experimental results show that the proposed topology exhibits good performance.

• New & Renewable Energy
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• v.3 no.4
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• pp.69-76
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• 2007

In this paper, a PV multi-string PCS with a grid-connection is proposed. An improved MPPT algorithm for the PV multi-string PCS is suggested. Each PV string has its own MPP tracker and the proposed MPPT algorithm prevents LMPP tracking due to power ripple. In the PV PCS with single-phase inverter has a large current ripple at twice the grid frequency. The current ripple reduction algorithm without external component is suggested. Also, this paper proposes a simple control method to achieve sharing of the PV string voltage and current among the interleaved parallel boost converters. All algorithms and controllers are implemented on a single-chip microcontroller. Experimental results obtained on a 3kW prototype show high performance of the proposed PV multi-string PCS.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.556-558
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• 1994

This paper proposes a new converter that can reduce the harmonics like conventional 12-pulse dual thyrister converters with the input transformers. Both the bridges are controlled with the shifted firing angle and connected through current sharing reactors. Using the center tapped reactor, the DC link current is controlled with the different two values in order to make the input current waveform 12 pulses.

• 한국신재생에너지학회:학술대회논문집
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• 2007.11a
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• pp.255-258
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• 2007

In this paper, a PV multi-string PCS with a grid-connection is proposed. An improved MPPT algorithm for the PV multi-string PCS is suggested. Each PV string has its own MPP tracker and the proposed MPPT algorithm prevents LMPP tracking due to power ripple. In the PV PCS with single-phase inverter has a large current ripple at twice the grid frequency. The current ripple reduction algorithm without external component is suggested. Also, this paper proposes a simple control method to achieve sharing of the PV string voltage and current among the interleaved parallel boost converters. All algorithms and controllers are implemented on a single-chip microcontroller. Experimental results obtained on a 3kW prototype show high performance of the proposed PV multi-string PCS.

• Journal of Power Electronics
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• v.12 no.2
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.433-434
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• 2007

This paper describes a low-voltage dynamic random-access memory (DRAM) focusing on subthreshold leakage reduction during self-refresh (sleep) mode. By sharing a power switch, multiple iterative circuits such as row and column decoders have a significantly reduced subthreshold leakage current. To reduce the leakage current of complex logic gates, dual channel length scheme and input vector control method are used. Because all node voltages during the standby mode are deterministic, zigzag super-cutoff CMOS is used, allowing to Preserve internal data. MTCMOS technique Is also used in the circuits having no need to preserve internal data. Sub-1.2-V 1-Gb mobile DDR DRAM employing all these low-power techniques was designed in a 60 nm CMOS technology and achieved over 77% reduction of overall leakage current during the self-refresh mode.

• Journal of the Korea Institute of Military Science and Technology
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• v.21 no.1
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• pp.103-114
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• 2018

The operational concept of control systems on surface combatants has been changed from individual control for each system to integrated control for all systems due to computing technology development and crew reduction policy of navy. The purpose of this study is to identify current status of control technology, to analyze user requirement and to develop an architecture to support the conceptual change of ship control. An architecture, which integrates several control and monitoring systems on naval surface combatant, is proposed. The proposed architecture is focused on sharing network and computing resources related to user command, and reducing systems complexity. The architecture can be adopted to next surface combatants in Korean navy.

• Journal of Power Electronics
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• v.10 no.1
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• pp.91-96
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• 2010

In this paper, a simplified control algorithm for a three-phase, four-wire unified power quality conditioner (UPQC) is presented to compensate for supply voltage distortions/unbalance, supply current harmonics, the supply neutral current, the reactive power and the load unbalance as well as to maintain zero voltage regulation (ZVR) at the point of common coupling (PCC). The UPQC is realized by the integration of series and shunt active filters (AFs) sharing a common dc bus capacitor. The shunt AF is realized using a three-phase, four leg voltage source inverter (VSI) and the series AF is realized using a three-phase, three leg VSI. A dynamic model of the UPQC is developed in the MATLAB/SIMULINK environment and the simulation results demonstrating the power quality improvement in the system are presented for different supply and load conditions.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.501-505
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• 2001

The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between inverters on synchronous d-q reference frame.