• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.1
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• pp.63-73
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• 1988

In this paper, an algorithm is proposed to evaluate the source-to-terminal reliability, the probability that a source node can communicate with a terminal node, in a probabilistic derected graph. By using Satyanaratana's factoring $theorem^{(7)}$, the original graph can be partitioned into two reduced graphs obtained by contracting and deleting the edge connected to the source node in the probabilistic directed graph. The edge removal proposed in this paper and the general series-parallel reduction can then be applied to the reduced graph. This edge reduction can be applied recursively to the reduced graphs until a source node can be connected to a terminal node by one edge. A computer program which can be applied to evaluating the source-to-terminal reliability in a complex and large network has also been developed.

• Journal of Korean Institute of Industrial Engineers
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• v.40 no.1
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• pp.118-127
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• 2014

The configuration such as series, parallel and k-out-of-n of a repairable system directly affects its reliability. The maintenance strategy can also affect the overall performance of the system. The objective of this work is to investigate the possible trade-off between the configuration of a repairable k-out-of-n system and its maintenance strategy. The redundancy is considered to be the design decision variables, whereas the preventive maintenance period is considered to be the maintenance decision variables. The optimization model is used to minimize the overall life cycle cost associated with the system, considering constraint on reliability. Finally, genetic algorithm is used to find the optimal values for the decision variables. The result is compared with optimal values for considering redundancy and maintenance respectively.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1187-1194
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• 2017

In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.

• Journal of information and communication convergence engineering
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• v.11 no.3
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• pp.147-152
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• 2013

A novel balun being the structure of a Wilkinson power divider is suggested and fabricated. One of the power dividing paths in the suggested balun uses a conventional ${\lambda}/4$ transmission line for $-90^{\circ}$ phase shifting, and the other path uses a composite right/left-handed -${\lambda}/4$ transmission line for $+90^{\circ}$ phase shifting with four series capacitors and three parallel inductors. In addition, the suggested balun uses two $50-{\Omega}$ resistors and a conventional $50-{\Omega}$ transmission line of ${\lambda}/2$ electrical length between the two output ports, achieving good isolation and reflection values of two balanced ports. The suggested balun is simulated by the advanced design system simulation program and fabricated on TLX-9 20-mil substrate. The fabricated balun has a very good values of $S_{11}$ = -27.46 dB, $S_{21}$ = -3.40 dB, and $S_{31}$ = -3.28 dB, a phase difference of $-179.5^{\circ}$, a magnitude difference of 0.12 dB, and a delay difference of 0.1 ns, with $S_{22}$ = -36.28 dB, $S_{33}$ = -27.19 dB, and $S_{32}$ = -25.2 dB at 1 GHz, respectively.

• Journal of Power Electronics
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• v.14 no.4
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• pp.722-732
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• 2014

The power-voltage (P-V) curve of photovoltaic (PV) arrays connected in parallel to bypass diodes would have several local maximum power points (LMPP) under partial shading conditions (PSC). Conventional maximum power point tracking (MPPT) methods fail to search for the global maximum power point (MPP) because the searched peak point may remain at the LMPP on the P-V curve under PSC. This study proposes an improved MPPT algorithm to ensure that PV arrays operate at global maximum power point (GMPP) under PSC. The proposed algorithm is based on a critical study and a series of observations of PV characteristics under PSC. Results show the regularity of voltage interval between LMPPs. The algorithm has the advantages of rapidly reaching GMPP, maintaining stability, and recovering GMPP quickly when the operating condition changes. Simulation and experimental results demonstrate the feasibility of the proposed algorithm.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.5
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• pp.379-386
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• 2009

This paper investigates the operation of ITER(International Thermonuclear Experimental Reactor) Vertical Stabilization(VS) converter with circulating current. The VS converter has two subunits in parallel. The subunit is composed two back-to-back 12 pulse thyristor converter in series. The circulating current free technique can not always maintain the closed path for the load current because of a dead time zone of the converter operation at the region of the load current inversion. The complex circulation current technique for the load current inversion with VS converter can achieve the fast response and always maintain the closed path for the load curret. The paper proposes the new circulating current algorithm for the load current inversion of ITER VS converter and proves the performance of the circulating current technique with PSIM simulation study.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.04a
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• pp.5-8
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• 2004

We have investigated equivalent-circuit analysis of organic light-emitting diodes using frequency-dependent response of $ITO/Alq_3(60nm)/Al$ device at two different bias voltages. Complex impedance Z of the device was measured in the frequency range of 40Hz~1MHz. A Cole-Cole plot shows that there are two dielectric relaxations at the bias below turn-on voltage, and one relaxation at the bias above turn-on voltage. We are able to interpret the frequency-dependent response in terms of equivalent-circuit model of contact resistance $R_s$ in series with parallel combination of resistance $R_p$ and capacitance $C_p$. We have obtained contact resistance $R_s$ around $90{\Omega}$, mainly from the ITO anode.

• Journal of Sensor Science and Technology
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• v.24 no.2
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• pp.119-123
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• 2015

This paper presents the inkjet-printed flexible temperature and humidity sensor(F-TH sensor) using PEDOT:PSS. The series, mesh and parallel type sensing element using PEDOT:PSS ink was printed on the overhead projector(OHP) film. The fabricated sensor of each structure has the temperature sensitivity of $140{\Omega}/^{\circ}C$, $29{\Omega}/^{\circ}C$ and $1.4{\Omega}/^{\circ}C$ with linearity, respectively. Also the fabricated sensor was not only possible to measure a temperature, but also to detect humidity. The humidity sensitivity of $400{\Omega}/%RH$, $3.4{\Omega}/%RH$ and $3{\Omega}/%RH$ with linearity, respectively. The fabricated F-TH sensor is expected for the various applications such as electronic devices, bio-healthcare, industrial field.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.6
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• pp.502-507
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• 2006

According to large-sized LCD, the CCFL used in backlight is getting longer and a backlight using one lamp makes a needed brightness by arranging lamp in parallel because of the limit of brightness. In this paper, the inverter to nu the large back-light in 42inch LCD TV using 20 CCFLs was designed to produce the same output on each lamp in any input condition. Supplementing the conventional high-low method driving CCFL, by adopting high-high one, the brightness variation among each lamp sides is improved. Additionally, to improve the brightness variation, the method connecting the lamp and the capacitor in series is used. The proposed system was verified by the experiment.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.6
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• pp.995-1000
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• 2017

In this paper, we present an electrical arc detection algorithm using the mash-up analysis technique which is the core technology for the autonomous electrical safety management system(AESMS) of the multi-unit dwellings. The mash-up analysis technique analyzes the voltage, load current, zero phase current data simultaneously to judge arc faults. In order to develop the arc fault detection algorithm, the characteristics of series arc and parallel arc were analyzed. Also, we propose the mash-up analysis technique that analyzes waveforms of voltage, load current, and zero phase current at the same time. The arc fault detection algorithm was developed using the mash-up analysis technique. The developed algorithm can prevent electrical disasters in an effective way through accident prediction, and it will be used as a basic technology to introduce an autonomous electrical safety management system.