• Journal of the Korea Society for Simulation
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• v.10 no.1
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• pp.25-34
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• 2001

In this paper, we describe the generation method of interface logic which replace between IP & IP handshaking signal with asynchronous logic circuit. Especially, we suggest the new asynchronous sequential "Waveform to VHDL" code creation algorithm by flow chart conversion : Wave2VHDL - if only mixed asynchronous timing waveform is presented the level type input and pulse type input for handshaking, we convert waveform to flowchart and then replace with VHDL code according to converted flowchart. Also, we confirmed that asynchronous electronic circuits are created by applying extracted VHDL source code from suggest algorithm to conventional domestic/abroad CAD Tool, Finally, we assured the simulation result and the suggest timing diagram are identical.

• Journal of KIISE:Software and Applications
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• v.26 no.9
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• pp.1105-1113
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• 1999

객체 지향 소프트웨어의 확장과 더불어 소프트웨어의 재사용성의 중요도가 부각되면서 소프트웨어를 콤포넌트 단위로 구현하는 추세이다. 따라서 콤포넌트 기반의 소프트웨어 개발에서의 통합 테스트가 중요한 이슈로 떠오르고 있다. 그러나 콤포넌트들의 통합 테스트에 대한 연구는 미흡한 상태이다. 본 논문에서는 UML을 기반으로 체계적인 통합 테스트 모형을 제안하고. 나아가 본 논문에서는 "멀티미디어 정보처리 시스템"의 사례를 본 논문의 콤포넌트 통합 테스트 모형에 적용한 결과를 분석하여 기술한다. 콤포넌트 통합 테스트 모형은 UML(Unified Modeling Language)의 순서도(sequence diagram)와 협력도(collaboration diagram)를 이용하여 전체 시스템에서 UML의 사건흐름을 구성하는 콤포넌트들 사이의 인터페이스 영역에 존재하는 오류들을 추출한다. 그리고 UML을 기반으로 통합 테스트를 수행함으로써, 테스트 준비 작업을 줄이고, 기존의 UML 지원 도구들과 연계하여 테스트 자동화 도구의 구현을 앞당길 수 있다. 또한 시스템의 순차적 흐름 뿐 아니라, 동시에 수행되는 흐름에 대한 정보까지 모두 수용하여 테스트함으로써, 콤포넌트 기반의 분산 환경의 특성에 적합하다. Abstract As the object-oriented approach to software development becomes more mature, software development from pre-existing, independently developed components becomes an important aim of software engineering. Therefore, integration testing becomes an important aspect of component-based software development. However, there has been little work done in the area of the component-based integration testing. In this paper, we propose the "component integration test model" which is based on UML. Furthermore, we describe a case study on "Multimedia Information Processing System" conducted to analyse the result from which our model is applied. Our model extracts the faults, which exist in interfaces of components, using sequence diagram and collaboration diagram of UML(Unified Modeling Language). As our model is based on UML, the preparation effort for testing is reduced and its test-tools can be implemented more easily through linking existing UML tool. And our model accepts the information of concurrent flow represented by collaboration diagram as well as sequential flow, so it is more suitable to component-based distributed environment.based distributed environment.

• IE interfaces
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• v.6 no.1
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• pp.47-54
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• 1993

Sequential Numbering System(SNS) is one of the production and inventory management system, which is more effective and practical to minor enterprises than Material Requirement Planning (MRP) system or Just-in-Time(JIT) system. The purpose of the paper is the structured analysis of SNS as the first phase of software development. Data Flow Diagram(DFD), Data Dictionary(DD), and Mini-Specs are used to analyze the system through the second level. The result can be exploited to SNS software design and programming.

• The Journal of Engineering Geology
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• v.24 no.4
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• pp.643-648
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• 2014

Understanding of fracture networks and rock mass properties during tunnel construction is extremely important for the prediction of dangers during excavation, and for deciding on appropriate excavation techniques and support. However, rapid construction process do not allow sufficient time for surveys and interpretations for spatial distributions of fractures and rock mass properties. This study introduces a new statistical approach for predicting joint distributions at foreside of current excavation face during the excavation process. The proposed methodology is based on a cumulative space diagram for joint sets. The diagram displays the cumulative spacing between adjacent joints on the vertical axis and the sequential position of each joint plotted at equally spaced intervals on the horizontal axis. According to the diagram, the degree of linearity of points representing the regularity of joint spacing; a linear trend of the points indicates that the joints are evenly spaced, with the slope of the line being directly related to the spacing. The linear points which are stepped indicates that the fracture set show clustered distribution. A clustered pattern within the linear group of points indicates a clustered joint distribution. Fractures surveyed from an excavated space can be plotted on this diagram, and the diagram can then be extended further according to the plotted diagram pattern. The extension of the diagram allows predictions about joint spacing in areas that have not yet been excavated. To test the model, we collected and analyzed data during excavation of a 10-m-long tunnel. Fractures in a 3-m zone behind the excavation face were predicted during the excavation, and the predictions were compared with observations. The methodology yielded reasonably good predictions of joint locations.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.831-839
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• 2009

An interlocking equipment of railway signalling systems is manufactured with electrical devices and electrical interlocking equipment has been substituted for existing interlock equipment(relay sequential logic type). But interlock conditions are still generated from rail diagram and used to make Interlock Table manually. In order to make EIS(Electrical Interlock System) operate, we should write interlock data which is made from interlock table. But, as the station is larger and more complicated, handwork may becomes a very tediou work and makes more mistakes. Therefore the development of CAD system for Interlocking System is very significant, if CAD can reduce the mistakes from handwork and help the configuring the interlocking system. In this paper, we first arrange some rules which can be used to extract route information automatically from rail diagram and interlocking rules. And then we propose "Search-And-Rollback" algorithm to extract route information and individual interlocking rules. The proposed algorithm is implemented and tested through the signal design process of the Hyundai-Steel private railway to carry melted pig iron from the blast furnace to the steel-making workshop. some cases. It shows that CAD for Interlocking system is very helpful in time saving aspect and system reliability.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.05a
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• pp.82-87
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• 2001

In this paper we described the generation method of interface logic which can be replace between IP and IP handshaking signal with asynchronous logic circuit. Especially, we suggest the new \"Waveform Conversion Algorithm : Wave2VHDL\", if only mixed asynchronous timing waveform suggested which level type input and pulse type input for handshaking, we can convert waveform to flowchart and then replaced with VHDL code according to converted flowchart. Also, we assure that asynchronous electronic circuits for IP interface are generated by applying extracted VHDL source code from suggested algorithm to conventional domestic/abroad CAD Tool, and then we proved that coincidence simulation result and suggested timing diagram.g diagram.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1260-1268
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• 2005

Ladder Diagram(LD) is the most extensively used among PLC standard language for the design of control system. But LD has the disadvantages for data processing and maintenance. On the other hand, the Sequential Function Chart(SFC) graphic language is very powerful for describing the sequential logic control algorithm. SFC is based on flow chart, so control flow understanding is very easy and divergence can possible improving its ability. In this paper, we propose the efficient management elevator system using the action qualifiers and choice divergence. From the result, we confirm the SFC language reduced program memory capacity and processing time is faster than LD language.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.107-112
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• 2010

When we design the control system used Programmable Logic controller(PLC), if we program a Sequential Function Chart(SFC), It is easy to understand the sequential flow of control, to maintenance the controller and to describe a program. SFC language is programmed by a single sequence, a select sequence and a parallel sequence. In a select sequence, when the select step is error, the whole process is stopped. If the error step has no connection the whole process, the loss is down when we debugging the program without stopping the whole process. Therefore, this thesis shows the efficient method of remote control for select sequence and we confirmed its feasibility through actual example.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.1
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• pp.74-80
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• 2006

This paper addresses the trajectory optimization of Unmanned Aerial Vehicles(UAVs) under multiple ground threats like enemy's anti-air radar sites. The power of radar signal reflected by the vehicle and the flight time are considered in the performance cost to be minimized. The bank angle is regarded as control input for a 1st-order lag vehicle, and input parameter optimization method based on Sequential Quadratic Programming (SQP) is used for trajectory optimization. The proposed path planning method provides more practical trajectories with enhanced survivability than those of Voronoi diagram method.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.10
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• pp.5134-5139
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• 2013

Ladder Diagram(LD) or Sequential Function Chart(SFC) is used for the design of complex modern control system with Programmable logic controller(PLC). LD is the most widely utilized among PLC standard language. But recently, SFC is used frequently. SFC is very easy to grasp the sequential flow of control logic but is difficult for describing combinational logic. When the interrupt factor is occurred, the main program is stopped. And after the interrupt program is completed, the main program is restart. Therefore the more complex the interrupt program, the main program is interrupted downtime will be that much longer. In this paper, we propose the method for interrupt implementation without the dwell time of the main program by SFC language and confirm his feasibility through the simulation.