• Title/Summary/Keyword: Semiconductor wafer

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The Solubility of Ozone in Deionized Water and its Cleaning Efficiency (초순수내에서의 오존의 용해도와 세정효과)

  • Han, Jeoung-Hoon;Park, Jin-Goo;Kwak, Young-Shin
    • Korean Journal of Materials Research
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    • v.8 no.6
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    • pp.532-537
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    • 1998
  • The purpose of this study was to investigate the behavior of ozone in DI water and the reaction with wafers during the semiconductor wet cleaning process. The solubility of ozone in DI water was not only dependent on the temperature but also directly proportional to the input concentration of ozone. The lower the initial ozone concentration and the temperature, the longer the half-life time of ozone. The reaction order of ozone in DI water was calculated to be around 1.5. The redox potential reached a saturation value in 5min and slightly increased as the input ozone concentrations increased. The completely hydrophilic surface was created in Imin when HF etched silicon wafer was cleaned in ozonized DI water containing higher ozone concentrations than 2ppm. Spectroscopic ellipsometry measurements showed that the chemical oxide formed by ozonized DI water was measured to be thicker than that by piranha solution. The wafers contaminated with a non-ionic surfactant were more effectively cleaned in ozonized DI water than in piranha and ozonized piranha solutions.

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Effects of Curing Temperature on the Optical and Charge Trap Properties of InP Quantum Dot Thin Films

  • Mohapatra, Priyaranjan;Dung, Mai Xuan;Choi, Jin-Kyu;Jeong, So-Hee;Jeong, Hyun-Dam
    • Bulletin of the Korean Chemical Society
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    • v.32 no.1
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    • pp.263-272
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    • 2011
  • Highly luminescent and monodisperse InP quantum dots (QDs) were prepared by a non-organometallic approach in a non-coordinating solvent. Fatty acids with well-defined chain lengths as the ligand, a non coordinating solvent, and a thorough degassing process are all important factors for the formation of high quality InP QDs. By varying the molar concentration of indium to ligand, QDs of different size were prepared and their absorption and emission behaviors studied. By spin-coating a colloidal solution of InP QD onto a silicon wafer, InP QD thin films were obtained. The thickness of the thin films cured at 60 and $200^{\circ}C$ were nearly identical (approximately 860 nm), whereas at $300^{\circ}C$, the thickness of the thin film was found to be 760 nm. Different contrast regions (A, B, C) were observed in the TEM images, which were found to be unreacted precursors, InP QDs, and indium-rich phases, respectively, through EDX analysis. The optical properties of the thin films were measured at three different curing temperatures (60, 200, $300^{\circ}C$), which showed a blue shift with an increase in temperature. It was proposed that this blue shift may be due to a decrease in the core diameter of the InP QD by oxidation, as confirmed by the XPS studies. Oxidation also passivates the QD surface by reducing the amount of P dangling bonds, thereby increasing luminescence intensity. The dielectric properties of the thin films were also investigated by capacitance-voltage (C-V) measurements in a metal-insulator-semiconductor (MIS) device. At 60 and $300^{\circ}C$, negative flat band shifts (${\Delta}V_{fb}$) were observed, which were explained by the presence of P dangling bonds on the InP QD surface. At $300^{\circ}C$, clockwise hysteresis was observed due to trapping and detrapping of positive charges on the thin film, which was explained by proposing the existence of deep energy levels due to the indium-rich phases.

A study on the oxide semiconductor $[(I_{n2}O_3)_x{\cdot}(S_nO_2)_{1-x}]_{(n)}/Silicon(p)$, solar cells fabricated by two source evaporation (이가열원(二加熱源) 증착법(蒸着法)에 이한 산화물(酸化物) 반도체(半導體) $[(I_{n2}O_3)_x{\cdot}(S_nO_2)_{1-x}]_{(n)}/Silicon(p)$, 태양전지(太陽電池)에 관한 연구(硏究))

  • Jhoon, Choon-Saing;Kim, Yong-Woon;Lim, Eung-Choon
    • Solar Energy
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    • v.12 no.2
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    • pp.62-78
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    • 1992
  • The solar cells of $ITO_{(n)}/Si_{(p)}$, which are ITO thin films deposited and heated on Si wafer 190[$^{\circ}C$], were fabricated by two source vaccum deposition method, and their electrical properties were investigated. Its maximum output is obtained when the com- position of the thin film consist of indium oxide 91[mole %] and thin oxide 9[mole %]. The cell characteristics can be improved by annealing but are deteriorated at temperature above 600[$^{\circ}C$] for longer than 15[min]. Also, we investigated the spectral response with short circuit current of the cells and found that the increasing of the annealing caused the peak shifted to the long wavelength region. And by experiment of the X-ray diffraction, it is shown to grow the grains of the thin film with increasment of annealing temperature. The test results from the $ITO_{(n)}/Si_{(p)}$ solar cell are as follows. short circuit current : Isc= 31 $[mW/cm^2]$ open circuit voltage : Voc= 460[mV] fill factor : FF=0.71 conversion efficiency : ${\eta}$=11[%]. under the solar energy illumination of $100[mW/cm^2]$.

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Fabrication process of embedded passive components in MCM-D (MCM-D 기판 내장형 수동소자 제조공정)

  • 주철원;이영민;이상복;현석봉;박성수;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.1-7
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    • 1999
  • We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

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Structural and photoelectrical properties of copper phthalocyanine(CuPc) thin film on Si substrate by thermal evaporation (Si 기판위에 열증착법으로 제조한 copper phthalocyanine(CuPc) 박막의 구조 및 광전특성)

  • Lee, Hea-Yeon;Jeong, Jung-Hyun;Lee, Jong-Kyu
    • Journal of Sensor Science and Technology
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    • v.6 no.5
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    • pp.407-413
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    • 1997
  • The crystallized CuPc(copper phthalocyanine) film on a p-type <100> Si substrate is prepared at the substrate temperature of $300^{\circ}C$ by thermal evaporation. X -ray diffraction analysis showed the CuPc film to have a-axis oriented structure. For the measurement of photovoltaic characteristics of the CuPc/Si film and the Si substrate, a transverse current-voltage (I-V) curve is observed. In the dark, the Au/Si junction is shown to be ohmic contact. However, under illumination, a photovoltaic effect is not observed. The I-V curve in the dark indicates that the CuPc film on Si may form an ohmic contact. Since the CuPc film is a p-type semiconductor, the CuPc/p-Si junction has no barrier at the interface. Under illumination, the CuPc/Si junction shows a large photocurrent comparing with that of the wafer. The result indicates that the CuPc layer plays an important role in the photocarrier generation under red illumination (600 nm). The CuPc/Si film shows the photo voltaic characteristics with a short-circuit photocurrent ($J_{sc}$) of $4.29\;mA/cm^{2}$ and an open-circuit voltage ($V_{oc}$) of 12 mA.

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Sol-gel deposited TiInO thin-films transistor with Ti effect

  • Kim, Jung-Hye;Son, Dae-Ho;Kim, Dae-Hwan;Kang, Jin-Kyu;Ha, Ki-Ryong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.200-200
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    • 2010
  • In recent times, metal oxide semiconductors thin films transistor (TFT), such as zinc and indium based oxide TFTs, have attracted considerable attention because of their several advantageous electrical and optical properties. There are many deposition methods for fabrication of ZnO-based materials such as chemical vapor deposition, RF/DC sputtering and pulsed laser deposition. However, these vacuum process require expensive equipment and result in high manufacturing costs. Also, the methods is difficult to fabricate various multicomponent oxide semiconductor. Recently, several groups report solution processed metal oxide TFTs for low cost and non vacuum process. In this study, we have newly developed solution-processed TFTs based on Ti-related multi-component transparent oxide, i. e., InTiO as the active layer. We propose new multicomponent oxide, Titanium indium oxide(TiInO), to fabricate the high performance TFT through the sol-gel method. We investigated the influence of relative compositions of Ti on the electrical properties. Indium nitrate hydrate [$In(NO^3).xH_2O$] and Titanium isobutoxide [$C_{16}H_{36}O_4Ti$] were dissolved in acetylacetone. Then monoethanolamine (MEA) and acetic acid ($CH_3COOH$) were added to the solution. The molar concentration of indium was kept as 0.1 mol concentration and the amount of Ti was varied according to weighting percent (0, 5, 10%). The complex solutions become clear and homogeneous after stirring for 24 hours. Heavily boron (p+) doped Si wafer with 100nm thermally grown $SiO_2$ serve as the gate and gate dielectric of the TFT, respectively. TiInO thin films were deposited using the sol-gel solution by the spin-coating method. After coating, the films annealed in a tube furnace at $500^{\circ}C$ for 1hour under oxygen ambient. The 5% Ti-doped InO TFT had a field-effect mobility $1.15cm^2/V{\cdot}S$, a threshold voltage of 4.73 V, an on/off current ratio grater than $10^7$, and a subthreshold slop of 0.49 V/dec. The 10% Ti-doped InO TFT had a field-effect mobility $1.03\;cm^2/V{\cdot}S$, a threshold voltage of 1.87 V, an on/off current ration grater than $10^7$, and a subthreshold slop of 0.67 V/dec.

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Study of Tungsten Nitride Diffusion Barrier for Various Nitrogen Gas Flow Rate by Employing Nano-Mechanical Analysis (Nano-Mechanics 분석을 통한 질화 텅스텐 확산방지막의 질소 유량에 따른 연구)

  • Kwon, Ku Eun;Kim, Sung Joon;Kim, Soo In;Lee, Chang Woo
    • Journal of the Korean Vacuum Society
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    • v.22 no.4
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    • pp.188-192
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    • 2013
  • Many studies have been conducted for preventing from diffusion between silicon wafer and metallic thin film due to a decrease of line-width and multi-layer thin film for miniaturization and high integration of semiconductor. This paper has focused on the nano-mechanical property of diffusion barrier which sample is prepared for various gas flow rate of nitrogen with tungsten (W) base from 2.5 to 10 sccm. The deposition rate, resistivity and crystallographic properties were measured by a ${\beta}$-ray back-scattering spectroscopy, 4-point probe and x-ray diffraction (XRD), respectively. We also has investigated the nano-mechanical property using the nano-indenter. As a result, the surface hardness of W-N thin film was increased rapidly from 10.07 to 15.55 GPa when the nitrogen gas flow was increased from 2.5 to 5 sccm. And the surface hardness of W-N thin film had 12.65 and 12.77 GPa at the nitrogen gas flow of 7.5 and 10 sccm respectively. These results were decreased by the comparison with the W-N thin film at nitrogen gas flow of 5 sccm. It was inferred that these severe changes were caused by the stoichiometric difference between the crystalline and amorphous state in W-N thin film. In addition, these results were caused by increased compressive stress.

Motion Vector Based Overlay Metrology Algorithm for Wafer Alignment (웨이퍼 정렬을 위한 움직임 벡터 기반의 오버레이 계측 알고리즘 )

  • Lee Hyun Chul;Woo Ho Sung
    • KIPS Transactions on Software and Data Engineering
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    • v.12 no.3
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    • pp.141-148
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    • 2023
  • Accurate overlay metrology is essential to achieve high yields of semiconductor products. Overlay metrology performance is greatly affected by overlay target design and measurement method. Therefore, in order to improve the performance of the overlay target, measurement methods applicable to various targets are required. In this study, we propose a new algorithm that can measure image-based overlay. The proposed measurement algorithm can estimate the sub-pixel position by using a motion vector. The motion vector may estimate the position of the sub-pixel unit by applying a quadratic equation model through polynomial expansion using pixels in the selected region. The measurement method using the motion vector can calculate the stacking error in all directions at once, unlike the existing correlation coefficient-based measurement method that calculates the stacking error on the X-axis and the Y-axis, respectively. Therefore, more accurate overlay measurement is possible by reflecting the relationship between the X-axis and the Y-axis. However, since the amount of computation is increased compared to the existing correlation coefficient-based algorithm, more computation time may be required. The purpose of this study is not to present an algorithm improved over the existing method, but to suggest a direction for a new measurement method. Through the experimental results, it was confirmed that measurement results similar to those of the existing method could be obtained.

Growth of ring-shaped SiC single crystal via physical vapor transport method (PVT 방법에 의한 링 모양의 SiC 단결정 성장)

  • Kim, Woo-Yeon;Je, Tae-Wan;Na, Jun-Hyuck;Choi, Su-Min;Lee, Ha-Lin;Jang, Hui-Yeon;Park, Mi-Seon;Jang, Yeon-Suk;Jung, Eun-Jin;Kang, Jin-Ki;Lee, Won-Jae
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.32 no.1
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    • pp.1-6
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    • 2022
  • In this research, a ring-shaped silicon carbide (SiC) single crystal manufactured using the PVT (Physical Vapor Transport) method was proposed to be applied to a SiC focus ring in semiconductor etching equipment. A cylindrical graphite structure was placed inside the graphite crucible to grow a ring-shaped SiC single crystal by the PVT method. SiC single crystal ring without crack was successfully obtained in case of using SiC single crystal wafer as a seed. A plasma etching process was performed to compare plasma resistance between the CVD-SiC focus ring and the PVT-SiC focus ring. The etch rate of ring materials in PVT-single crystal SiC focus ring was definitely lower than that of CVD-SiC focus ring, indicating better plasma resistance of PVT-SiC focus ring.

Application of CMP Process to Improving Thickness-Uniformity of Sputtering-deposited CdTe Thin Film for Improvement of Optical Properties (스퍼터링 증확 CdTe 박막의 두께 불균일 현상 개선을 위한 화학적기계적연마 공정 적용 및 광특성 향상)

  • Park, Ju-Sun;Lim, Chae-Hyun;Ryu, Seung-Han;Myung, Kuk-Do;Kim, Nam-Hoon;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.375-375
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    • 2010
  • CdTe as an absorber material is widely used in thin film solar cells with the heterostructure due to its almost ideal band gap energy of 1.45 eV, high photovoltaic conversion efficiency, low cost and stable performance. The deposition methods and preparation conditions for the fabrication of CdTe are very important for the achievement of high solar cell conversion efficiency. There are some rearranged reports about the deposition methods available for the preparation of CdTe thin films such as close spaced sublimation (CSS), physical vapor deposition (PVD), vacuum evaporation, vapor transport deposition (VTD), closed space vapor transport, electrodeposition, screen printing, spray pyrolysis, metalorganic chemical vapor deposition (MOCVD), and RF sputtering. The RF sputtering method for the preparation of CdTe thin films has important advantages in that the thin films can be prepared at low growth temperatures with large-area deposition suitable for mass-production. The authors reported that the optical and electrical properties of CdTe thin film were closely connected by the thickness-uniformity of the film in the previous study [1], which means that the better optical absorbance and the higher carrier concentration could be obtained in the better condition of thickness-uniformity for CdTe thin film. The thickness-uniformity could be controlled and improved by the some process parameters such as vacuum level and RF power in the sputtering process of CdTe thin films. However, there is a limitation to improve the thickness-uniformity only in the preparation process [1]. So it is necessary to introduce the external or additional method for improving the thickness-uniformity of CdTe thin film because the cell size of thin film solar cell will be enlarged. Therefore, the authors firstly applied the chemical mechanical polishing (CMP) process to improving the thickness-uniformity of CdTe thin films with a G&P POLI-450 CMP polisher [2]. CMP process is the most important process in semiconductor manufacturing processes in order to planarize the surface of the wafer even over 300 mm and to form the copper interconnects with damascene process. Some important CMP characteristics for CdTe were obtained including removal rate (RR), WIWNU%, RMS roughness, and peak-to-valley roughness [2]. With these important results, the CMP process for CdTe thin films was performed to improve the thickness-uniformity of the sputtering-deposited CdTe thin film which had the worst two thickness-uniformities of them. Some optical properties including optical transmittance and absorbance of the CdTe thin films were measured by using a UV-Visible spectrophotometer (Varian Techtron, Cary500scan) in the range of 400 - 800 nm. After CMP process, the thickness-uniformities became better than that of the best condition in the previous sputtering process of CdTe thin films. Consequently, the optical properties were directly affected by the thickness-uniformity of CdTe thin film. The absorbance of CdTe thin films was improved although the thickness of CdTe thin film was not changed.

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