• Title/Summary/Keyword: Semiconductor package

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The Performance Advancement of Test Algorithm for Inner Defects in Semiconductor Packages (반도체 패키지의 내부 결함 검사용 알고리즘 성능 향상)

  • 김재열;윤성운;한재호;김창현;양동조;송경석
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.345-350
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    • 2002
  • In this study, researchers classifying the artificial flaws in semiconductor packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method fur entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

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The Intelligence Algorithm of Semiconductor Package Evaluation by using Scanning Acoustic Tomograph (Scanning Acoustic Tomograph 방식을 이용한 지능형 반도체 평가 알고리즘)

  • Kim J. Y.;Kim C. H.;Song K. S.;Yang D. J.;Jhang J. H.
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2005.05a
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    • pp.91-96
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    • 2005
  • In this study, researchers developed the estimative algorithm for artificial defects in semiconductor packages and performed it by pattern recognition technology. For this purpose, the estimative algorithm was included that researchers made software with MATLAB. The software consists of some procedures including ultrasonic image acquisition, equalization filtering, Self-Organizing Map and Backpropagation Neural Network. Self-Organizing Map and Backpropagation Neural Network are belong to methods of Neural Networks. And the pattern recognition technology has applied to classify three kinds of detective patterns in semiconductor packages: Crack, Delamination and Normal. According to the results, we were confirmed that estimative algorithm was provided the recognition rates of $75.7\%$ (for Crack) and $83_4\%$ (for Delamination) and $87.2\%$ (for Normal).

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Electromagnetic Susceptibility Analysis of I/O Buffers Using the Bulk Current Injection Method

  • Kwak, SangKeun;Nah, Wansoo;Kim, SoYoung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.114-126
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    • 2013
  • In this paper, we present a set of methodologies to model the electromagnetic susceptibility (EMS) testing of I/O buffers for mobile system memory based on the bulk current injection (BCI) method. An efficient equivalent circuit model is developed for the current injection probe, line impedance stabilization network (LISN), printed circuit board (PCB), and package. The simulation results show good correlation with the measurements and thus, the work presented here will enable electromagnetic susceptibility analysis at the integrated circuit (IC) design stage.

Development and Characterization of Pattern Recognition Algorithm for Defects in Semiconductor Packages

  • Kim, Jae-Yeol;Yoon, Sung-Un;Kim, Chang-Hyun
    • International Journal of Precision Engineering and Manufacturing
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    • v.5 no.3
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    • pp.11-18
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    • 2004
  • In this paper, the classification of artificial defects in semiconductor packages is studied by using pattern recognition technology. For this purpose, the pattern recognition algorithm includes the user made MATLAB code. And preprocess is made of the image process and self-organizing map, which is the input of the back-propagation neural network and the dimensionality reduction method, The image process steps are data acquisition, equalization, binary and edge detection. Image process and self-organizing map are compared to the preprocess method. Also the pattern recognition technology is applied to classify two kinds of defects in semiconductor packages: cracks and delaminations.

Laser Processing Technology in Semiconductor and Display Industry (반도체 및 디스플레이 산업에서의 레이저 가공 기술)

  • Cho, Kwang-Woo;Park, Hong-Jin
    • Journal of the Korean Society for Precision Engineering
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    • v.27 no.6
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    • pp.32-38
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    • 2010
  • Laser material processing technology is adopted in several industry as alternative process which could overcome weakness and problems of present adopted process, especially semiconductor and display industry. In semiconductor industry, laser photo lithography is doing at front-end level, and cutting, drilling, and marking technology for both wafer and EMC mold package is adopted. Laser cleaning and de-flashing are new rising technology. There are 3 kinds of main display industry which use laser technology - TFT LCD, AMOLED, Touch screen. Laser glass cutting, laser marking, laser direct patterning, laser annealing, laser repairing, laser frit sealing are major application in display industry.

The Performance Advancement of Test Algorithm for Inner Defects In Semiconductor Packages (반도체 패키지의 내부 결함 검사용 알고리즘 성능 향상)

  • Kim J.Y.;Kim C.H.;Yoon S.U.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.10a
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    • pp.721-726
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    • 2005
  • In this study, researchers classifying the artificial flaws in semiconductor. packages are performed by pattern recognition technology. For this purposes, image pattern recognition package including the user made software was developed and total procedure including ultrasonic image acquisition, equalization filtration, binary process, edge detection and classifier design is treated by Backpropagation Neural Network. Specially, it is compared with various weights of Backpropagation Neural Network and it is compared with threshold level of edge detection in preprocessing method for entrance into Multi-Layer Perceptron(Backpropagation Neural network). Also, the pattern recognition techniques is applied to the classification problem of defects in semiconductor packages as normal, crack, delamination. According to this results, it is possible to acquire the recognition rate of 100% for Backpropagation Neural Network.

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Design Parameter Optimization for Hall Sensor Application

  • Park, Chang-Sung;Cha, Gi-Ho;Kang, Hyun-Soon;Song, Chang-Sup
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.86.3-86
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    • 2001
  • Hall effect sensor using 7um, 1.7 ohm-cm or 10um, 3.5 ohm-cm Bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes to optimize offset voltage and sensitivity for proper applications. In order to measure offset voltage in chip scale the Agilent company´s 4156C and Nano-Voltage Meter were used and the best structure in offset voltage was finally selected by using ceramic package. The patterns appear to be the quadri-rectangular patterns entirely and three-parallelogram patterns. The measured offset voltages were found to be about 173-365uV. Meanwhile, in ...

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A Study on the BGA Package Measurement using Noise Reduction Filters (잡음제거 필터를 이용한 BGA 패키지 측정에 관한 연구)

  • Jin, Go-Whan
    • Journal of the Korea Convergence Society
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    • v.8 no.11
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    • pp.15-20
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    • 2017
  • Recently, with the development of the IT industry, interest in computer convergence technology is increasing in various fields. Especially, in the semiconductor field, a vision system that uses a camera and computer convergence is often used to inspect semiconductor device defects in the production process. Various systems have been studied to remove noise, which is a major cause of degradation in processing of data related to these image processing systems. In this paper, we try to detect defects in BGA (Ball Grid Array) package devices by recognizing defects in advance during mass production. We propose a measurement system using a Gaussian filter, a Median filter, and an Average filter, which are widely used for noise reduction of image data Applying the proposed system to the manufacturing process of the BGA package can be used to judge whether the defect is good or not, and it is expected that productivity will be improved.

Heat Dissipation Technology of IGBT Module Package (IGBT 전력반도체 모듈 패키지의 방열 기술)

  • Suh, Il-Woong;Jung, Hoon-Sun;Lee, Young-Ho;Kim, Young-Hun;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.3
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    • pp.7-17
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    • 2014
  • Power electronics modules are semiconductor components that are widely used in airplanes, trains, automobiles, and energy generation and conversion facilities. In particular, insulated gate bipolar transistors(IGBT) have been widely utilized in high power and fast switching applications for power management including power supplies, uninterruptible power systems, and AC/DC converters. In these days, IGBT are the predominant power semiconductors for high current applications in electrical and hybrid vehicles application. In these application environments, the physical conditions are often severe with strong electric currents, high voltage, high temperature, high humidity, and vibrations. Therefore, IGBT module packages involves a number of challenges for the design engineer in terms of reliability. Thermal and thermal-mechanical management are critical for power electronics modules. The failure mechanisms that limit the number of power cycles are caused by the coefficient of thermal expansion mismatch between the materials used in the IGBT modules. All interfaces in the module could be locations for potential failures. Therefore, a proper thermal design where the temperature does not exceed an allowable limit of the devices has been a key factor in developing IGBT modules. In this paper, we discussed the effects of various package materials on heat dissipation and thermal management, as well as recent technology of the new package materials.

The Size Effect and Its Optical Simulation of Y3Al5O12:Ce3+ Phosphors for White LED (백색 LED용 Y3Al5O12:Ce3+ 형광체 크기 효과 및 광 시뮬레이션)

  • Lee, Sung Hoon;Kang, Tae Wook;Kim, Jong Su
    • Journal of the Semiconductor & Display Technology
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    • v.18 no.1
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    • pp.10-14
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    • 2019
  • In this study, we synthesized two $Y_3Al_5O_{12}:Ce^{3+}$ phosphors ($7{\mu}m$-sized and $2{\mu}m$-sized YAG) with different sizes by controlling particles sizes of starting materials of the phosphors for white LED. In the smaller one ($2{\mu}m$-sized YAG), its photoluminescence intensity in the reflective mode was 63 % that of the bigger one ($7{\mu}m$-sized YAG); the quantum efficiencies were 93 % and 70 % for the smaller and the bigger ones. Two kinds of white LED packages with the same color coordinates were fabricated with a blue package (chip size $53{\times}30$) and two phosphors. The luminous flux of the white LED package with the smaller YAG phosphor was 92 % of that with the bigger one, indicating that the quantum efficiency of phosphor dispersed inside LED package was higher than that of the pure powder. It was consistently confirmed by the optical simulation (LightTools 6.3). It is notable according to the optical simulation that the white LED with the smaller phosphor showed 24 % higher luminous efficiency. If the smaller one had the same quantum efficiency as the bigger one (~93 %). Therefore, it can be suggested that the higher luminous efficiency of white LED can be possible by reducing the particle size of the phosphor along with maintaining its similar quantum efficiency.