• JSTS:Journal of Semiconductor Technology and Science
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• 제6권2호
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• pp.101-105
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• 2006

Nanoscale floating-gate characteristic of colloidal Au nanoparticles electrostatically assembled on the oxidized surface of Si nanowires have been investigated. The Si nanowire split-gate transistor structure was fabricated by electron beam lithography and subsequent reactive ion etching. Colloidal Au nanoparticles with ${\sim}5$ nm diameters were selectively deposited onto the Si nanowire surface by 2 min electrophoresis. It was found that electric fields applied to the self-aligned split side gates allowed charge to be transferred on the Au nanoparticles. It was observed that the depletion mode cutoff voltage, induced by the self-aligned side gates, was shifted by more than 1 V after Au nanoparticle electrophoresis. This may be due to the semi-one dimensional nature of the narrow Si nanowire transport channel, having much enhanced sensitivity to charges on the surface.

• 한국재료학회지
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• 제20권1호
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• pp.25-30
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• 2010

Si nanowire/multiwalled carbon nanotube nanocomposite arrays were synthesized. Vertically aligned Si nanowire arrays were fabricated by Ag nanodendrite-assisted wet chemical etching of n-type wafers using $HF/AgNO_3$ solution. The composite structure was synthesized by formation of a sheath of carbon multilayers on a Si nanowire template surface through a thermal CVD process under various conditions. The results of Raman spectroscopy, scanning electron microscopy, and high resolution transmission electron microcopy demonstrate that the obtained nanocomposite has a Si nanowire core/carbon nanotube shell structure. The remarkable feature of the proposed method is that the vertically aligned Si nanowire was encapsulated with a multiwalled carbon nanotube without metal catalysts, which is important for nanodevice fabrication. It can be expected that the introduction of Si nanowires into multiwalled carbon nanotubes may significantly alter their electronic and mechanical properties, and may even result in some unexpected material properties. The proposed method possesses great potential for fabricating other semiconductor/CNT nanocomposites.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.108-109
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• 2006

ZnO semiconductor has a wide band gap of 3.37 eV and a large exciton binding energy of 60 meV, and displays excellent sensing and optical properties. In particular, ZnO based 1D nanowires and nanorods have received intensive attention because of their potential applications in various fields. We grew ZnO buffer layers prior to the growth of ZnO nanorods for the fabrication of the vertically well-aligned ZnO nanorods without any catalysts. The ZnO nanorods were grown on Si (111) substrates by vertical MOCVD. The ZnO buffer layers were grown with various thicknesses at $400^{\circ}C$ and their effect on the formation of ZnO nanorods at $300^{\circ}C$ was evaluated by FESEM, XRD, and PL. The synthesized ZnO nanorods on the ZnO film show a high quality, a large-scale uniformity, and a vertical alignment along the [0001]ZnO compared to those on the Si substrates showing the randomly inclined ZnO nanorods. For sample using ZnO buffer layer, 1D ZnO nanorods with diameters of 150-200 nm were successively fabricated at very low growth temperature, while for sample without ZnO buffer the ZnO films with rough surface were grown.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.440-440
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• 2009

Semiconductor nanowires offer exciting possibilities as components of solar cells and have already found applications as active elements in organic, dye-sensitized, quantum-dot sensitized, liquid-junction, and inorganic solid-state devices. Among many semiconductors, silicon is by far the dominant material used for worldwide photovoltaic energy conversion and solar cell manufacture. For silicon wire to be used for solar device, well aligned wire arrays need to be fabricated vertically or horizontally. Macroscopic silicon wire arrays suitable for photovoltaic applications have been commonly grown by the vapor-liquid-solid (VLS) process using metal catalysts such as Au, Ni, Pt, Cu. In the case, the impurity issues inside wire originated from metal catalyst are inevitable, leading to lowering the efficiency of solar cell. To escape from the problem, the wires of purity of wafer are the best for high efficiency of photovoltaic device. The fabrication of wire arrays by the electrochemical etching of silicon wafer with photolithography can solve the contamination of metal catalyst. In this presentation, we introduce silicon wire arrays by electrochemical etching method and then fabrication methods of radial p-n junction wire array solar cell and the various merits compared with conventional silicon solar cells.

• 한국재료학회지
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• 제20권4호
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• pp.199-203
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• 2010

Hybridization of semiconductor materials with carbon nanotubes (CNTs) is a recent field of interest in which new nanodevice fabrication and applications are expected. In this work, nanowire type GaAs structures are synthesized on porous single-wall carbon nanotubes (SWCNTs) as templates using the molecular beam epitaxy (MBE) technique. The field emission properties of the as-synthesized products were investigated to suggest their potential applications as cold electron sources, as well. The SWCNT template was synthesized by the arc-discharge method. SWCNT samples were heat-treated at $400^{\circ}C$ under an $N_2/O_2$ atmosphere to remove amorphous carbon. After heat treatment, GaAs was grown on the SWCNT template. The growth conditions of the GaAs in the MBE system were set by changing the growth temperatures from $400^{\circ}C$ to $600^{\circ}C$. The morphology of the GaAs synthesized on the SWCNTs strongly depends on the substrate temperature. Namely, nano-crystalline beads of GaAs are formed on the CNTs under $500^{\circ}C$, while nanowire structures begin to form on the beads above $600^{\circ}C$. The crystal qualities of GaAs and SWCNT were examined by X-ray diffraction and Raman spectra. The field emission properties of the synthesized GaAs nanowires were also investigated and a low turn-on field of $2.0\;V/{\mu}m$ was achieved. But, the turn-on field was increased in the second and third measurements. It is thought that arsenic atoms were evaporated during the measurement of the field emission.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2009년도 춘계학술발표대회
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• pp.22.2-22.2
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• 2009

Currently, metal silicides become increasingly more essential part as a contact material in complimentary metal-oxide-semiconductor (CMOS). Among various silicides, NiSi has several advantages such as low resistivity against narrow line width and low Si consumption. Generally, metal silicides are formed through physical vapor deposition (PVD) of metal film, followed by annealing. Nanoscale devices require formation of contact in the inside of deep contact holes, especially for memory device. However, PVD may suffer from poor conformality in deep contact holes. Therefore, Atomic layer deposition (ALD) can be a promising method since it can produce thin films with excellent conformality and atomic scale thickness controllability through the self-saturated surface reaction. In this study, Ni thin films were deposited by thermal ALD using bis(dimethylamino-2-methyl-2-butoxo)nickel [Ni(dmamb)2] as a precursor and NH3 gas as a reactant. The Ni ALD produced pure metallic Ni films with low resistivity of 25 $\mu{\Omega}cm$. In addition, it showed the excellent conformality in nanoscale contact holes as well as on Si nanowires. Meanwhile, the Ni ALD was applied to area-selective ALD using octadecyltrichlorosilane (OTS) self-assembled monolayer as a blocking layer. Due to the differences of the nucleation on OTS modified surfaces toward ALD reaction, ALD Ni films were selectively deposited on un-coated OTS region, producing 3 ${\mu}m$-width Ni line patterns without expensive patterning process.

• 접착 및 계면
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• 제23권4호
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• pp.116-121
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• 2022

Organic field-effect transistor가 실제 전자 장치에 쓰이기 위해서는 유기반도체 용액공정용 미세 패터닝 기술이 요구된다. 본 연구에서는 기존의 스핀 코팅 방법보다 미세 패턴을 형성할 수 있는 소프트 리소그래피 방법이 더 우수한 전기적 특성을 가질 수 있다는 것을 확인하기 위해 비교 분석하였다. Compact Disc 표면의 나노 패턴을 이용하여 유연한 마스터 몰드를 제작하였고, 650 nm 폭의 2,7-Dioctyl [1] benzothieno [3,2-b] [1] benzo thiophene (C_8-BTBT) 나노 와이어를 얻었다. 그 결과 소프트 리소그래피 방법을 이용해 제작된 소자 이동도는 0.086 cm²/Vs이며, 스핀 코팅으로 만들어진 소자 이동도는 0.0036 cm²/Vs으로 소프트 리소그래피 방법으로 제작된 소자가 약 20배 이상 높은 이동도와 더 우수한 전기적 성능을 보였다.