• Title/Summary/Keyword: Semiconductor Process Data

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A temperature sensor with low standard deviation with generating reference voltage for use in IoT applications (IoT 어플리케이션에서 활용하는 참조 전압을 같이 생성할 수 있는 표준 편차가 낮은 온도 센서)

  • Juwon Oh;Younggun Pu;Yeonjae Jung;Kangyoon Lee
    • Transactions on Semiconductor Engineering
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    • v.2 no.2
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    • pp.10-14
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    • 2024
  • This paper presents a circuit design aimed at generating the required reference voltage and temperature sensor voltage in conjunction with an ADC, utilizing the current generated by temperature characteristics of BJT components for sensor data conversion. Additionally, two control methods are introduced to reduce the standard deviation of the circuit, resulting in over a ten-fold decrease in standard deviation. The proposed circuit occupies an area of 0.057mm2 and was implemented using 55nm RF process.

A Study on the Causes of False Alarm by NFPA921 in Semiconductor Factory (반도체공장의 NFPA921에 의한 비화재보 원인조사 방안)

  • Sang-Hyuk Hong;Ha-Sung Kong
    • Journal of the Korea Safety Management & Science
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    • v.25 no.4
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    • pp.87-94
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    • 2023
  • This study analyzed and identified various causes of caustic alarms of 163 fire detectors that occurred from January 2019 to December 2021 at domestic semiconductor manufacturing plants equipped with about 30,000 fire detectors, and proposed a new non-fire prevention cause investigation plan by applying the NFPA 921 scientific methodology. The results of the study are as follows. First, in terms of necessary recognition and problem definition, an analog detector and an integrated monitoring system were proposed to quickly determine the location and installation space information of the fire detector. Second, in order to prevent speculative causes and errors in various analyses in terms of data analysis and hypothesis establishment, non-fire reports were classified into five by factor and defined, and the causes of occurrence by factor were classified and proposed. Finally, in terms of hypothesis verification and final hypothesis selection, a non-fire prevention improvement termination process and a final hypothesis verification sheet were proposed to prevent the cause from causing re-error.

Efficient Multicasting Mechanism for Mobile Computing Environment Machine learning Model to estimate Nitrogen Ion State using Traingng Data from Plasma Sheath Monitoring Sensor (Plasma Sheath Monitoring Sensor 데이터를 활용한 질소이온 상태예측 모형의 기계학습)

  • Jung, Hee-jin;Ryu, Jinseung;Jeong, Minjoong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2022.05a
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    • pp.27-30
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    • 2022
  • The plasma process, which has many advantages in terms of efficiency and environment compared to conventional process methods, is widely used in semiconductor manufacturing. Plasma Sheath is a dark region observed between the plasma bulk and the chamber wall surrounding it or the electrode. The Plasma Sheath Monitoring Sensor (PSMS) measures the difference in voltage between the plasma and the electrode and the RF power applied to the electrode in real time. The PSMS data, therefore, are expected to have a high correlation with the state of plasma in the plasma chamber. In this study, a model for predicting the state of nitrogen ions in the plasma chamber is training by a deep learning machine learning techniques using PSMS data. For the data used in the study, PSMS data measured in an experiment with different power and pressure settings were used as training data, and the ratio, flux, and density of nitrogen ions measured in plasma bulk and Si substrate were used as labels. The results of this study are expected to be the basis of artificial intelligence technology for the optimization of plasma processes and real-time precise control in the future.

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FE-simulation of Drawing Process for Al-1%Si Bonding Wire Considering Fine Si Particle (미세 Si 입자를 고려한 Al-1%Si 본딩 와이어의 신선공정해석)

  • Ko, D.C.;Hwang, W.H.;Lee, S.K.;Kim, B.M.
    • Transactions of Materials Processing
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    • v.15 no.6 s.87
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    • pp.421-427
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    • 2006
  • Drawing process of Al-1%Si bonding wire considering fine Si particle is analyzed in this study using FE-simulation. Al-1%Si boding wire requires electric conductivity because Al-1%Si bonding wire is used for interconnection in semiconductor device. About 1% of Si is added to Al wire for dispersion-strengthening. Distribution and shape of fine Si particle have strongly influence on the wire drawing process. In this study, therefore, the finite-element model based on the observation of wire by continuous casting is used to analyze the effect of various parameters, such as the reduction in area, the semi-die angle, the aspect ratio, the inter-particle spacing and orientation angle of the fine Si particle on wire drawing processes. The effect of each parameter on the wire drawing process is investigated from the aspect of ductility and defects of wire. From the results of the analysis, it is possible to obtain the important basic data which can be guaranteed in the fracture prevention of Al-1 %Si wire.

A Study on UBM Method Detecting Mean Shift in Autocorrelated Process Control

  • Jun, Sang-Pyo
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.12
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    • pp.187-194
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    • 2020
  • In today's process-oriented industries, such as semiconductor and petrochemical processes, autocorrelation exists between observed data. As a management method for the process where autocorrelation exists, a method of using the observations is to construct a batch so that the batch mean approaches to independence, or to apply the EWMA (Exponentially Weighted Moving Average) statistic of the observed value to the EWMA control chart. In this paper, we propose a method to determine the batch size of UBM (Unweighted Batch Mean), which is commonly used as a management method for observations, and a method to determine the optimal batch size based on ARL (Average Run Length) We propose a method to estimate the standard deviation of the process. We propose an improved control chart for processes in which autocorrelation exists.

PECVD Chamber Cleaning End Point Detection (EPD) Using Optical Emission Spectroscopy Data

  • Lee, Ho Jae;Seo, Dongsun;Hong, Sang Jeen;May, Gary S.
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.5
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    • pp.254-257
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    • 2013
  • In-situ optical emission spectroscopy (OES) is employed for PECVD chamber monitoring. OES is used as an addon sensor to monitoring and cleaning end point detection (EPD). On monitoring plasma chemistry using OES, the process gas and by-product gas are simultaneously monitored. Principal component analysis (PCA) enhances the capability of end point detection using OES data. Through chamber cleaning monitoring using OES, cleaning time is reduced by 53%, in general. Therefore, the gas usage of fluorine is also reduced, so satisfying Green Fab challenge in semiconductor manufacturing.

Comparison between Two 450 mm Multi-Electrode Models

  • Park, Gi-Jeong;Lee, Yun-Seong;Yu, Dae-Ho;Lee, Jin-Won;Jang, Hong-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.490-490
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    • 2013
  • In semiconductor industry, it is expected that plasma process which use 450 mm source will be used at next generation. However, main obstacle of the large area plasma source is plasma uniformity from it. When electrode is enlarged, field difference between center area and side area reduces the plasma uniformity [1-3]. Therefore we investigate multi-electrode which diminish this field difference.We designed two multi-electrode models. One has two segments and the other has five segments. Each multi-electrode model is connected with two power generator and two matchers. One generator and one matcher is connected with center electrode part. The other one generator and the other one matcher is connected with side electrode part. The ion density is measured at 29 points by using floating harmonic method [4-6]. After measuring the data of each multi-electrode model, we discuss the difference of profile between two models' data.

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The Design of a 0.15 ps High Resolution Time-to-Digital Converter

  • Lee, Jongsuk;Moon, Yong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.3
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    • pp.334-341
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    • 2015
  • This research outlines the design of a HR-TDC (High Resolution Time-to-Digital Converter) for high data rate communication systems using a $0.18{\mu}m$ CMOS process. The coarse-fine architecture has been adopted to improve the resolution of the TDC. A two-stage vernier time amplifier (2S-VTA) was used to amplify the time residue, and the gain of the 2S-VTA was larger than 64. The error during time amplification was compensated using two FTDCs (Fine-TDC) with their outputs. The resolution of the HR-TDC was 0.15 ps with a 12-bit output and the power consumption was 4.32 mW with a 1.8-V supply voltage.

Parallel algorithm of global routing for general purpose associative processign system (법용 연합 처리 시스템에서의 전역배선 병렬화 기법)

  • Park, Taegeun
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.4
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    • pp.93-102
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    • 1995
  • This paper introduces a general purpose Associative Processor(AP) which is very efficient for search-oriented applications. The proposed architecture consists of three main functional blocks: Content-Addressable Memory(CAM) arry, row logic, and control section. The proposed AP is a Single-Instruction, Multiple-Data(SIMD) device based on a CAM core and an array of high speed processors. As an application for the proposed hardware, we present a parallel algorithm to solve a global routing problem in the layout process utilizing the processing capabilities of a rudimentary logic and the selective matching and writing capability of CAMs, along with basic algorithms such a minimum(maximum) search, less(greater) than search and parallel arithmetic. We have focused on the simultaneous minimization of the desity of the channels and the wire length by sedking a less crowded channel with shorter wire distance. We present an efficient mapping technique of the problem into the CAM structure. Experimental results on difficult examples, on randomly generated data, and on benchmark problems from MCNC are included.

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The Modeling of the Transistor Saturation Current of the BJT for Integrated Circuits Considering the Base (베이스 영역의 불순물 분포를 고려한 집적회로용 BJT의 역포화전류 모델링)

  • 이은구;김태한;김철성
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.4
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    • pp.13-20
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    • 2003
  • The model of the transistor saturation current of the BJT for integrated circuits based upon the semiconductor physics is proposed. The method for calculating the doping profile in the base region using process conditions is presented and the method for calculating the base Gummel number of lateral PNP BJT and vertical NPN BJT is proposed. The transistor saturation currents of NPN BJT using 20V and 30V process conditions obtained from the proposed method show an average relative error of 6.7% compared with the measured data and the transistor saturation currents of PNP BJT show an average relative error of 6.0% compared with the measured data.