• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.113-114
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• 2009

Silicon carbide is one of the most attractive and promising wide band-gap semiconductor material with excellent physical properties and huge potential for electronic applications. Up to now, the most successful method for growth of large SiC crystals with high quality is the physical vapor transport (PVT) method [1, 2]. Since further reduction of defect densities in larger crystal are needed for the true implementation of SiC devices, many researchers are focusing to improve the quality of SiC single crystal through the process modifications for SiC bulk growth or new material implementations [3, 4]. It is well known that for getting high quality SiC crystal, source materials with high purity must be used in PVT method. Among various source materials in PVT method, a SiC powder is considered to take an important role because it would influence on crystal quality of SiC crystal as well as optimum temperature of single crystal growth, the growth rate and doping characteristics. In reality, the effect of powder on SiC crystal could definitely exhibit the complicated correlation. Therefore, the present research was focused to investigate the quality difference of SiC crystal grown by conventional PVT method with using various SiC powders. As shown in Fig. 1, we used three SiC powders with different particles size. The 6H-SiC crystals were grown by conventional PVT process and the SiC seeds and the high purity SiC source materials are placed on opposite side in a sealed graphite crucible which is surrounded by graphite insulation[5, 6]. The bulk SiC crystal was grown at $2300^{\circ}C$ of the growth temperature and 50mbar of an argon pressure. The axial thermal gradient across the SiC crystal during the growth is estimated in the range of $15\sim20^{\circ}C/cm$. The chemical etch in molten KOH maintained at $450^{\circ}C$ for 10 min was used for defect observation with a polarizing microscope in Nomarski mode. Electrical properties of bulk SiC materials were measured by Hall effect using van der Pauw geometry and a UV/VIS spectrophotometer. Fig. 2 shows optical photographs of SiC crystal ingot grown by PVT method and Table 1 shows electrical properties of SiC crystals. The electrical properties as well as crystal quality of SiC crystals were systematically investigated.

• Journal of the Korean Vacuum Society
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• v.16 no.1
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• pp.27-32
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• 2007

We have investigated photoluminescence(PL) spectra of four $In_xGa_{1-x}N(x=0.15)/GaN$ multiple quantum well(MQW) structures with different well widths in order to study a phenomenon on crystal phase separation. The asymmetic behavior of PL spectra becomes stronger with increase of the well width from 1.5 nm to 6.0 nm, which indicates dual-peak nature. Analyzing the dual-peak fit PL spectra, we have observed that the intensity of low-energy shoulder peak rapidly becomes stronger, compared to that of high-energy peak corresponding to a transition in InGaN QW. It suggests that InGaN QW has two phases with tiny different In compositions, and that In-rich(InN-like) phase forms more and more relatively than stoichiometric InGaN(x=0.15) phase by the InN phase separation mechanism as the QW width increases. PL spectrum of 6.0-nm sample shows an additional peak at low-energy lesion(${\sim}2.0\;eV$) whose energy position is almost the same as a defect band of yellow luminescence frequently observed in GaN epilayers. It may be due to a defect resulted from In deficiency formed with development of the phase separation.

• Korean Journal of Materials Research
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• v.13 no.6
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• pp.347-351
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• 2003

II-Ⅵ ZnO compound semiconductor thin films were grown on $\alpha$-Al$_2$O$_3$(0001) single crystal substrate by radical beam assisted molecular beam epitaxy and the optical properties were investigated. Zn(6N) was evaporated using Knudsen cell and O radical was assisted at the partial pressure of 1$\times$10$^{4}$ Torr and radical beam source of 250-450 W RF power. In $\theta$-2$\theta$ x-ray diffraction analysis, ZnO thin film with 500 nm thickness showed only ZnO(0002)and ZnO(0004) peaks is believed to be well grown along c-axis orientation. Photoluminescence (PL) measurement using He-Cd ($\lambda$=325 nm) laser is obtained in the temperature range of 9 K-300 K. At 9 K and 300 K, only near band edge (NBE) is observed and the FWHM's of PL peak of the ZnO deposited at 450 RF power are 45 meV and 145 meV respectively. From no observation of any weak deep level peak even at room temperature PL, the ZnO grains are regarded to contain very low defect density and impurity to cause the deep-level defects. The peak position of free exciton showed slightly red-shift as temperature was increased, and from this result the binding energy of free exciton can be experimentally determined as much as $58\pm$0.5 meV, which is very closed to that of ZnO bulk. By van der Pauw 4-point probe measurement, the grown ZnO is proved to be n-type with the electron concentration($n_{e}$ ) $1.69$\times$10^{18}$$cm^3$, mobility($\mu$) $-12.3\textrm{cm}^2$/Vㆍs, and resistivity($\rho$) 0.30 $\Omega$$\cdot$cm.

• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.55-61
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• 2009

This paper describes a point of production(POP) system which collects and manages real-time shop floor machining information in a wafer dicing process. The system are composed of POP terminal, line controller and network. In the configuration of the system, LAN and RS485 network are used for connection with the upper management system and down stratum respectively. As a bridge between POP terminal and server, a line controller is used. The real-time information which is the base of production management are collected from information resources such as machine, product and worker. The collected information are used for the calculation of optimal cutting condition. The collection of the information includes cutting speed, spout of pure water, accumulated count of cut in process for blade and wafer defect. In order to manage machining information in wafer dicing process, production planning information is delivered to the shop floor, and production result information is collected from the shop floor, delivered to the server and used for managing production plan. From the result of the system application, production progress status, work and non-working hour analysis for each machine, and wafer defect analysis are available, and they are used for quality and productivity improvements in wafer dicing process. A case study is implemented to evaluate the performance of the system.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.4
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• pp.19-25
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• 2011

The size reduction of the semiconductor chip and the improvement of the electrical performance have been enabled through the introduction of the Cu/Low-K process in modern electronic industries. However, Cu/Low-K has a disadvantage of the physical properties that is weaker than materials used for existing semiconductor manufacture process. It causes many problems in chip manufacturing and package processes. Especially, the delamination between the Cu layer and the low-K dielectric layer is a main defect after the temperature cycles. Since the Cu/Low-K layer is located on the top of the pad of the flip chip, the stress on the flip chip affects the Cu/Low-K layer directly. Therefore, it is needed to improve the underfill process or materials. Especially, it becomes very important to select the underfill to decrease the stress at the flip-chip and to protect the solder bump. We have solved the delamination problem in a 90 nm Cu/Low-K flip-chip package after the temperature cycle by selecting an appropriate underfill.

• Transactions on Electrical and Electronic Materials
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• v.1 no.1
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• pp.26-31
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• 2000

The ~1540 nm $^4$ $I_{13}$ 2/ longrightarro $w^4$ $I_{15}$ 2/ emissions of E $r^{3+}$ in Er-implanted GaN annealed at temperatures in the 400 to 100$0^{\circ}C$ range were investigated to gain a better understanding of the formation and dissociation processes of the various E $r^{3+}$ sites and the recovery of damage caused by the implantation with increasing annealing temperature ( $T_{A}$).The monotonic increase in the intensity of the broad defect photoluminescence(PL) bands with incresing $T_{A}$ proves that these are stable radiative recombination centers introduced by the implantation and annealing process. Theser centers cannot be attributed to implantation-induced damage that is removed by post-implantation annealing. Selective wavelength pumpling of PL spectra at 6K reveals the existence of at least nine different E $r^{3+}$ sites in this Er-implanted semiconductor. Most pf these E $r^{3+}$ PL centers are attributed to complexed of Er atoms with defects and impurities which are thermally activated at different $T_{A}$. Only one of the nine observed E $r^{3+}$ PL centers can be pumped by direct 4f absorption and this indicates that it is highest concentration E $r^{3+}$ center and it represents most of the optically active E $r^{3+}$ in the implanted sample. The fact that this E $r^{3+}$ center cannot be strongly pumped by above-gap light or broad band below-gap absorption indicates that it is an isolated center, i.e not complexed with defects or impurities, The 4f-pumped P: spectrum appears at annealing temperatures as low as 40$0^{\circ}C$, and although its intensity increase monotonically with increasing $T_{A}$ the wavelengths and linewidths of its characteristic peaks asre unaltered. The observation of this high quality E $r_{3+}$PL spectrum at low annealing temperatures illustrates that the crystalline structure of GaN is not rendered amorphous by the ion implantation. The increase of the PL intensities of the various E $R_{3+}$sites with increasing $T_{A}$is due to the removal of competing nonradiative channels with annealing. with annealing.annealing.

• Journal of the Korean Vacuum Society
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• v.2 no.2
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• pp.188-198
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• 1993

We have developed a technique for growing thin oxides (6~10 nm) by the Last step TCA method. N-channel metal-oxide-semiconductor (n-MOS) capacitor and n-channel metal-oxide-semiconductor field-effect transistor's (MOSFET's) having a gate oxide with chlorine incorporated $SiO_2/Si$ interface have been analyzed by electrical measurements and physical methods, such as secondary ion mass spectrometry (SIMS) and electron spectroscopy for chemical analysis (ESCA). The gate oxide grown with the Last strp TCA method has good characteristics as follows: the electron mobility of the MOSFET's with the Last step TCA method was increased by about 7% and the defect density at the $SiO_2/Si$ interface decreases slightly compared with that with No TCA method. In reliability estimation, the breakdown field was 18 MV/cm, 0.6 MV/cm higher than that of the gate oxide with No TCA method, and the lifetime estimated by TDDB measurement was longer than 20 years. The device lifetime estimated from hot-carrier reliability was proven to be enhanced. As the results, the gate oxide having a $SiO_2/Si$ interface incorporated with chlorine has good characteristics. Our new technique of Last step TCA method may be used to improve the endurance and retention of MOSFET's and to alleviate the degradation of thin oxides in short-channel MOS devices.

• Journal of the Korean Vacuum Society
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• v.17 no.4
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• pp.311-316
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• 2008

Since the presence of the chemical impurities and defect at surfaces and interfaces greatly influence the properties of various semiconductor devices, an unambiguous chemical characterization of the metal and semiconductor surfaces become more important in the view of the miniaturization of the devices toward nano scale. Among the various conventional surface characterization tools, Electron-induced Auger Electron Spectroscopy (EAES), X-ray Photoelectron Spectroscopy (XPS) and Secondary Electron Ion Mass Spectroscopy (SIMS) are being used for the identification of the surface chemical impurities. Recently, a novel surface characterizaion technique, Positron-annihilation induced Auger Electron Spectroscopy (PAES) is introduced to provide a unique method for the analysis of the elemental composition of the top-most atomic layer. In PAES, monoenergetic positron of a few eV are implanted to the surface under study and these positrons become thermalized near the surface. A fraction of the thermalized positron trapped at the surface state annihilate with the neighboring core-level electrons, creating core-hole excitations, which initiate the Auger process with the emission of Auger electrons almost simultaneously with the emission of annihilating gamma-rays. The energy of electrons is generally determined by employing ExB energy selector, which shows a poor resolution of $6{\sim}10eV$. In this paper, time-of-flight system is employed to measure the electrons energy with an enhanced energy resolution. The experimental result is compared with simulation results in the case of both linear (with retarding tube) and reflected TOF systems.

• Journal of IKEEE
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• v.22 no.1
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• pp.98-103
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• 2018

The CNTFET, which is widely recognized as a next-generation semiconductor, has a structure that can improve performance by positioning CNTs between the source and drain of a conventional MOSFET. However, positioning CNTs increases the complexity of a CNTFET's structure, and the process variation changes the complex structure into various shapes; so, when CNTFET device performance is analyzed, it requires more computation than that of a conventional MOSFET. These problems greatly increase the simulation time necessary for the analysis, and sometimes that analysis cannot be performed using an existing tool; they are therefore important obstacles to designing a circuit using a CNTFET. In this study, we will show that the existing Linear Programming methodology can be utilized to solve the long simulation time problem and discuss the effect of the suggested method in detail. Simulation results show that the Linear Programming method can reduce the number of simulation about 2.5 times when the maximum number of CNT is changed from 6 to 12.

• Proceedings of the Korean Society for Agricultural Machinery Conference
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• 2017.04a
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• pp.146-146
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• 2017

현대의 스마트폰 및 태블릿pc등을 가능하게 만든 집적 기술 중의 하나는 3차원 집적 회로(3D-IC)와 같은 패키징 기술이다. 이러한 첨단 3차원 집적 기술은 메모리집적을 통한 대용량 메모리 모듈 개발뿐만 아니라, 메모리와 프로세서의 집적, high-end FPGA, Back side imaging (BSI) 센서 모듈, MEMS 센서와 ASIC 집적, High Bright (HB) LED 모듈 등에 적용되고 있다. 3D-IC의 3차원 모듈 제작 시에는 기존에 발생하지 않았던 여러 가지 파괴 모드들이 발생하고 있는데 Thermal/Photonic Emission 장비 등 기존의 2차원 결함분리 (Fault Isolation) 기술로는 첨단의 3차원 적층 제품들에서 발생하는 불량을 비파괴적으로 혹은 3차원적으로 분리하는 것이 불가능하므로, 비파괴 3차원 결함 분리 기술은 향후 선행 제품 적기 개발에 매우 필수적인 기술이다. 본 연구는 3D-IC 반도체의 비파괴적 내부결함 검사를 위하여 가시광선-근적외선 대역(351nm~1770nm)의 InGaAs (Indium Galium Arsenide) 계열 영상검출기 (imaging detector)를 사용하여 분광 시스템 광학 설계를 통한 초분광 영상 기반 검출 모듈을 제작하였다. 제작된 초분광 영상 기반 검출 모듈을 이용하여 구리 회로 위에 실리콘 웨이퍼가 3단 적층 된 반도체 더미 샘플의 초분광 영상을 촬영하였으며, 촬영된 초분광 영상에 대하여 Chemometrics model 기반의 분석기술을 적용하여 실리콘 웨이퍼 내부의 집적 구조에 대한 검사가 가능함을 확인하였다.