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http://dx.doi.org/10.6117/kmeps.2011.18.4.019

Reliability Improvement of Cu/Low K Flip-chip Packaging Using Underfill Materials  

Hong, Seok-Yoon (Samsung Electro-Mechanics)
Jin, Se-Min (Samsung Electro-Mechanics)
Yi, Jae-Won (Samsung Electro-Mechanics)
Cho, Seong-Hwan (Samsung Electro-Mechanics)
Doh, Jae-Cheon (Samsung Electro-Mechanics)
Lee, Hai-Young (Department of Electrical Engineering, Ajou University)
Publication Information
Journal of the Microelectronics and Packaging Society / v.18, no.4, 2011 , pp. 19-25 More about this Journal
Abstract
The size reduction of the semiconductor chip and the improvement of the electrical performance have been enabled through the introduction of the Cu/Low-K process in modern electronic industries. However, Cu/Low-K has a disadvantage of the physical properties that is weaker than materials used for existing semiconductor manufacture process. It causes many problems in chip manufacturing and package processes. Especially, the delamination between the Cu layer and the low-K dielectric layer is a main defect after the temperature cycles. Since the Cu/Low-K layer is located on the top of the pad of the flip chip, the stress on the flip chip affects the Cu/Low-K layer directly. Therefore, it is needed to improve the underfill process or materials. Especially, it becomes very important to select the underfill to decrease the stress at the flip-chip and to protect the solder bump. We have solved the delamination problem in a 90 nm Cu/Low-K flip-chip package after the temperature cycle by selecting an appropriate underfill.
Keywords
Cu /Low-K; Underfill; Delamination; Glass transition temperature; Modulus;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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