• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.124-130
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• 2011

In this paper, We design and implementation of Self-Charging Module for charging to battery which obtaining the environment inergy such as solar energy. The power chared battery through the charging module send to sensor node. And implementation of System Activation Module(SAM) based on ID system and Dynamic Power Management Module(DPM) with SPO(Self Power Off). This system consume power only communication between the sensor nodes. We verification this system by implementing the high efficiency poweer management system.

• Journal of Platform Technology
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• v.6 no.3
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• pp.38-46
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• 2018

Smart Grid is an intelligent power grid for efficiently producing and consuming electricity through bi-directional communication between power producers and consumers. As renewable energy develops, the share of renewable energy in the smart grid is increasing. Renewable energy has a problem that it differs from existing power generation methods that can predict and control power generation because the power generation changes in real time. Applying a self-adaptative framework to the Smart Grid will enable efficient operation of the Smart Grid by adapting to the amount of renewable energy power generated in real time. In this paper, we assume that smart villages equipped with photovoltaic power generation facilities are installed, and apply the self-adaptative framework, AiTES, to show that smart grid can be efficiently operated through self adaptation framework.

• Journal of Advanced Marine Engineering and Technology
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• v.23 no.1
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• pp.40-46
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• 1999

A self-tuning FPID(Fuzzy Proportional Intergral Derivative) controller fo load frequency control of 2-area power systemis proposed in this paper. The paramters of the proposed self-tuning FPID controller are self-tuned by the proposed fuzzy inference technique. Therefore in this paper the fuzzy inference technique of PID gains using PSGM(Product Sum Gravity Method) is presented and is applied to the load frequency control of 2-area power system. The computer simulation results show that the proposed controller give better more control characteristics than convention-al PID, FLC under load changes.

• Journal of Power Electronics
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• v.10 no.6
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• pp.784-791
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• 2010

In this paper, a resonant pulse power converter (RPPC) is proposed. The proposed RPPC transfers the pulse-shape power from a DC source to a load periodically. The RPPC consists of a resonant circuit and a resonant pulse converter driven by a self-switching circuit. Depending on the magnitude difference between the input and output voltages, the operations of the RPPC are divided into 4 modes; boost mode, hybrid mode, direct mode and cut-off mode, respectively. The main switch of the RPPC turns on in the ZCS condition and off in the ZVS condition spontaneously. The operational principles of a RPPC using the self-switching technique are analyzed and verified in experiments. An example of a RPPC application is demonstrated in the area of thermoelectric energy harvesting.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.236-240
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• 2014

Induction motor requires a rotating magnetic for rotation. Current required to generate the rotating magnetic field is magnetizing current. This magnetizing current is associated with the reactive power. This reactive power must be supplied from source side. Therefore, the power factor of the induction motor is low. So, the capacitor is installed on the motor terminals to compensate for the low power factor. Power supply company has recommended to maintain a high power factor to the customer. If the capacitor current is greater than the magnetizing current of the motor, there is a possibility that the self-excitation occurs. So it is necessary to calculate the optimal capacity capacitor current does not exceed the magnetizing current. In this study, we first compute the no-load current and the reactive power of the induction motor and then calculates the limit of the maximum power factor without causing self-excitation.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• Journal of electromagnetic engineering and science
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• v.17 no.2
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• pp.105-107
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• 2017

The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.37-43
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• 2008

This paper introduces a high-speed low-power self-timed current-mode logic (STCML) that reduces both dynamic and leakage power dissipation. STCML significantly reduces the leakage portion of the power consumption using a pulse-mode control for shorting the virtual ground node. The proposed logic style also minimizes the dynamic portion of the power consumption due to short-circuit current by employing an enhanced self-timing buffer. Comparison results using a 80-nm CMOS technology show that STCML achieves 26 times reduction on leakage power consumption and 27% reduction on dynamic power consumption as compared to the conventional current-mode logic. They also indicate that up to 59% reduction on leakage power consumption compared to differential cascode voltage switch logic (DCVS).

• International Journal of Internet, Broadcasting and Communication
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• v.16 no.1
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• pp.36-46
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• 2024

This study is a descriptive survey to determine the effects of fundamentals of nursing skills education with peer evaluation on self-leadership, self-directed learning ability, and learning attitude. The factors affecting self-directed learning ability were peer evaluation, self-leadership, and learning attitude (F=118.81, p<.001), with an explanatory power of 50.4%. The factors affecting learning attitude were peer evaluation, self-leadership, and self-directed learning ability (F=48.89, p<.001), with an explanatory power of 29.5%. Based on the results of this study, we believe that it is necessary to apply various teaching methods such as peer evaluation and promote self-leadership to improve self-directed learning and learning attitude.

• Journal of Power Electronics
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• v.12 no.2
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• pp.242-248
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• 2012

Self oscillating current fed push pull resonant inverters can be controlled without using special drivers. Dc current flows through the choke coil and the power switches, although the driving signals of the power switches are sinusoidal. When the base current is near zero, the transistors cannot be operated in switching mode. Hence higher switching power losses and instantaneous peak power during off transitions are observed. In this study, an alternative design has been proposed to overcome this problem. A prototype circuit has been built which provides dc bias current to the base of the transistors. Experimental results are compared with theoretical calculations to demonstrate the validity of the design. The proposed design decreases the peak and average power losses by about 8 times, when compared to conventional designs.