• Journal of Power Electronics
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• 제18권4호
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• pp.1037-1050
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• 2018

This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

• Journal of Power Electronics
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• 제17권4호
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• pp.933-941
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• 2017

In this paper an improved low frequency selective harmonic elimination-PWM (SHE-PWM) technique for Cascaded H-bridge (CHB) converters is proposed. The proposed method is able to eliminate low order harmonics from the output voltage of the converter for a wide range of modulation indices. To solve SHE-PWM equations, especially for low modulation indices, a modified method is used which employs either the positive or negative voltage polarities of H-bridge cells to increase the freedom degrees of each cell. Freedom degrees of the switching angles are also used to increase the range of available solutions for non-linear SHE equations. The proposed SHE methods can successfully eliminate up to $25^{th}$ harmonic from a 7-level output voltage by using just nine switching transitions or a 150 Hz switching frequency. To confirm the validity of the proposed method, simulation and experimental results have been presented.

• 전력전자학회논문지
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• 제19권5호
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• pp.450-456
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• 2014

In HVDC converters that employ a line-commutated control, reactive power is absorbed by the rectifier and inverter terminals during AC/DC conversion. An AC filter usually consists of filters and large shunt capacitors to supply reactive power to the HVDC station. When STATCOM is used to supply reactive power to the HVDC system with AC filter, the low-order harmonics generated from STATCOM can result in a resonance between the shunt capacitor and AC network. Therefore, a control strategy based on selective harmonic elimination is adopted to minimize the low-order harmonics from STATCOM. The cancellation of harmonic instabilities is verified through simulations in PSCAD/EMTDC.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.1-4
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• 2003

This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.

• Journal of Power Electronics
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• 제15권4호
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• pp.964-973
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• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

• 전기전자학회논문지
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• 제28권3호
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• pp.432-439
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• 2024

본 논문은 재생배터리 에너지저장장치의 신뢰성과 전력품질 향상시키기 위해 개선된 단상 캐스케이드 H-브리지 기반 다중레벨 인버터의 선택적 고조파 제거 기법을 제안한다. 푸리에 급수에서 유도된 비선형 초월 방정식을 오프라인으로 풀어 선택적 고조파 제거 펄스 폭 변조 기법의 구현을 위한 최적의 스위칭 각도를 결정하며, 동작 중에 이 각도는 룩업 테이블을 통해 적용된다. 반복법인 Levenberg-Marquardt 알고리즘을 MATLAB에서 사용하여 방정식을 풀고 스위칭 각도를 얻었다. PLECS 시뮬레이션 소프트웨어를 통해 다중레벨 인버터에 사용되는 다른 기존의 펄스 폭 변조 기법들과 비교를 진행했으며, 제안된 방법의 유효성을 검증했다.

• Journal of Electrical Engineering and Technology
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• 제10권4호
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• pp.1682-1691
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• 2015

In this paper, a real time implementation of selective harmonic elimination pulse width modulation (SHEPWM) using Real Coded Genetic Algorithm (RGA), Particle Swarm Optimization technique (PSO) and a new technique known as Linearization Method (LM) for Single Phase Matrix Converter (SPMC) is designed and discussed. In the proposed technique, the switching frequency is fixed and the optimum switching angles are obtained using simple mathematical calculations. A MATLAB simulation was carried out, and FFT analysis of the simulated output voltage waveform confirms the effectiveness of the proposed method. An experimental setup was also developed, and the switching angles and firing pulses are generated using Field Programmable Gate Array (FPGA) processor. The proposed method proves that it is much applicable in the industrial applications by virtue of its suitability in real time applications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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• pp.296-300
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• 1989

The paper proposes a method to eliminate harmonics of PWM inverter fed induction motor system using Walsh series. In other words, this paper presents technique of the selective harmonics elimination(SHE) by W-FT series in three phase PWM inverter output waveform. A microprocessor(8086 CPU) - controlled three phase induction motor system in order to verify this algorithm is present. It is designed for a three output voltage in the 1$\sim$60 Hz inverter with the 5th and 7th harmonics, 5th, 7th, 11th, and 13th, harmonics eliminated, and with the fundamental wave amplitude proportional to the output frequency. In the PWM inverter, dead time circuit is inserted in the switching si gnats to prevent the de link shortage. This paper is deals with quantative prediction of dead-time effect and its compensation in PWM inverters. The performance of the compensation circuits is confirmed by the experiment.