• IEMEK Journal of Embedded Systems and Applications
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• v.15 no.6
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• pp.299-305
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• 2020

We have developed a scheduler that additionally consider network performance by extending the Kubernetes developed to manage lots of containers in cloud computing nodes. The network delay adapt characteristics of the compute nodes were learned during server operation and the learned results were utilized to develop placement algorithm by considering the existing measurement units, CPU, memory, and volume together, and it was confirmed that the low delay network service was provided through placement algorithm.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.1
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• pp.1-9
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• 2010

In this paper we propose a scheduling algorithm for supporting Quality of Service(QoS) in IEEE 802.11e HCCA referred to as ASR-DRR and ASD-DRR, which aims at providing improved performance for the support of multimedia traffic. Although We identify the problem of the current IEEE 802.11e HCCA (Hybrid Coordination Function Controlled Channel Access) scheduler and its numerous variations, that the queue information cannot be notified to the Hybrid Coordinator (HC) timely, therefore the uplink delay lengthens unnecessarily. We suggests a simple solution and a couple of implementation practices, namely the Adaptive Scheduler with RTS/CTS (ASR) and Adaptive Scheduler with Data/Ack (ASD). They are both further elaborated to emulate the Deficit Round Robin (DRR) scheduler. They are also compared with existing exemplary schedulers through simulation, and shown to perform well.

• Journal of Korea Multimedia Society
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• v.9 no.8
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• pp.1020-1029
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• 2006

Realization of high-capacity quality-of-service router needs fair packet schedulers with a lower complexity. Timestamp based fair packet schedulers have the ideal complexity of O(log V), where V is the maximum number of admitted flows, but it has been recently reduced to O(1) using bin concept. However, the latency property was deteriorated and the bandwidth utilization was also declined. In addition, traffic flows requiring strong delay bound may not be admitted. To overcome these problems, this paper proposes a Mini-Bin based Start-Time (MBST) scheduler with variable complexity and evaluates its performance. The MBST scheduler uses the timestamp calculation scheme of start-time based schedulers to enhance the bandwidth utilization and also introduces mini-bin concept to improve the latency, The performance evaluation shows that the proposed scheduler can reduce the complexity of the legacy start-tine based schedulers by $1.8{\sim}5$ times without deteriorating the bandwidth utilization property.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.25 no.4
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• pp.873-880
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• 2015

Since hardware-based kernel-integrity monitoring systems run in the environments that are isolated from the monitored OS, attackers in the monitored OS cannot undermine the security of monitoring systems. However, because the monitoring is performed by using physical addresses, the hardware-based monitoring systems are vulnerable to Address Translation Redirection Attack (ATRA) that manipulates virtual-to-physical memory translations. To ameliorate this problem, we propose a scheduler-based ATRA detection method. The method detects ATRA during the process scheduling by leveraging the fact that kernel scheduler engages every context switch of processes. We implemented a prototype on Android emulator and TizenTV, and verified that it successfully detected ATRA without incurring any significant performance loss.

• The Journal of the Korea Contents Association
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• v.5 no.3
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• pp.217-225
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• 2005

Currently the research on input-queued ATM switches is one of the most active research fields. Many achievements have been made in the research on scheduling algorithms for input-queued ATM switches and also applied in commerce. The scheduling algorithms have the characteristics of improving throughput, satisfying QoS requirements and providing service fairly. In this paper, we studied on an implementation of scheduler which arbitrates the input-queued ATM switches efficiently and swiftly. The proposed scheduler approximately provides $100\%$ throughput for scheduling. The proposed algorithm completes the arbitration for N-port VOQ switch with 4-iterative matching. Also the proposed algorithm has a merit for implementing the scheduling algorithm with 1/2 area compared to that of iSLIP scheduling algorithm which is widely used. The performance of the proposed scheduling algorithm is superior to that of iSLIP in 4-iterative matching.

• Journal of Digital Contents Society
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• v.18 no.7
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• pp.1411-1418
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• 2017

The batch job scheduler recognizes the computational resources configured in the cluster environment and plays a role of efficiently arranging the jobs in order. In order to efficiently use the limited available resources in the cluster, it is important to analyze and characterize the characteristics of user tasks. To do this, it is important to identify various scheduling algorithms and apply them to the system environment. Most scheduler software reflects the user's work environment, from job submission to termination, as well as the state of the inventory and system status of the entire managed object. It also stores various information related to task execution, such as job scripts, environment variables, libraries, wait for tasks, start and end times. In this paper, we analyze the execution log of the scheduler such as user 's success rate, execution time, and resource size through information related to job execution through batch scheduler. Based on this, it can be used as a basis to optimize the system by increasing the utilization rate of resources.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5C
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• pp.519-533
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• 2006

The number of channels specified in IEEE 802.15.4 Low-Rate Wireless Personal Area Networks(LRWPANs) is too few to operate many applications of WPANs in the same area. To overcome this limit, we introduce Virtual Channel, a novel concept to increase the number of available channels when various WPAN applications coexist. Basically, a virtual channel is a newly-created channel via superframe scheduling within the inactive period of a logical channel preoccupied by other WPANs. To maximize the coexistence capability of WPANs using virtual channels, we propose Least Collision superframe scheduler(LC-scheduler), its less complex heuristics both for a given single channel, and Virtual Channel Selector(VCS) to efficiently manage multiple available logical channels. In addition, a simple but practical synchronization method is developed to compensate different time drifts among coexisting WPANs. The simulation results demonstrate that a remarkable improvement on the coexistence capability of the 802.15.4 can be achieved through the proposed schemes.

• KIISE Transactions on Computing Practices
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• v.22 no.12
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• pp.663-674
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• 2016

Traditional supercomputing services suffer from limited accessibility and low utilization in that users(researchers) may perform computational executions only using terminal-based command line interfaces. To address this problem, in this paper, we provide the design and implementation details of National supercomputing service framework. The proposed framework supports all the fundamental primitive functions such as user management/authentication, heterogeneous computing resource management, HPC (High Performance Computing) job management, etc. so that it enables various 3rd-party applications to be newly built on top of the proposed framework. Our framework also provides Web-based RESTful OpenAPIs and the abstraction interfaces of job schedulers (as well as bundle scheduler plug-ins, for example, LoadLeveler, Open Grid Scheduler, TORQUE) in order to easily integrate the broad spectrum of heterogeneous computing clusters. To show and validate the effectiveness of the proposed framework, we describe the best practice scenario of high energy physics Lattice-QCD as an example application.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.4
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• pp.629-637
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• 2006

Currently the research on input-queued ATM switches is one of the most active research fields. Many achievements have been made in the research on scheduling algorithms for input-queued ATM switches and also applied in commerce. The scheduling algorithms have the characteristics of improving throughput, satisfying QoS requirements and providing service fairly. In this paper, we studied on an implementation of scheduler which arbirates the input-queued ATM switches efficiently and swiftly. The proposed scheduler approximately provides 100% throughput for scheduling. The proposed algorithm completes the arbitration for N-port VOQ switch with 4-iterative matching. Also the proposed algorithm has a merit for implementing the scheduling algorithm with 1/2 area compared to that of iSLIP scheduling algorithm which is widely used. The performance of the proposed scheduling algorithm is superior to that of iSLIP in 4-iterative matching. The proposed scheduling algorithm was implemented in FPGA and verified on board-level.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.3A
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• pp.223-232
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• 2004

In this paper we propose the hierarchical-based dynamic bandwidth allocation algorithm for multi-class services in Ethernet-PON. The proposed algorithm consists of the high level scheduler in OLT and the low level scheduler in ONU. The hierarchical architecture is able to provide scalability and resource efficiency in Ethernet-PON which has the distributed nature of the scheduling domain, with queues and the scheduler located at a large distance from each other. We also propose three dynamic bandwidth allocation algorithms for the low level scheduler: Proportional Allocation algorithm, Maximum Request First Allocation (MRFA) algorithm and High Priority First Allocation (HPFA) algorithm. We implement the Ethernet-PON standardized in the IEEE 802,3ah using OPNET. We also evaluate and analyze the performance for the proposed algorithms in terms of channel utilization, queuing delay and the amount of remainder.